| 781 | -- | 790 | Paolo Maffezzoni. Unified Computation of Parameter Sensitivity and Signal-Injection Sensitivity in Nonlinear Oscillators |
| 791 | -- | 802 | Lihong Zhang, Nuttorn Jangkrajarng, Sambuddha Bhattacharya, C.-J. Richard Shi. Parasitic-Aware Optimization and Retargeting of Analog Layouts: A Symbolic-Template Approach |
| 803 | -- | 816 | Natasa Miskov-Zivanov, Diana Marculescu. Modeling and Optimization for Soft-Error Reliability of Sequential Circuits |
| 817 | -- | 830 | S. Srivastava, J. Roychowdhury. Independent and Interdependent Latch Setup/Hold Time Characterization via Newton-Raphson Solution and Euler Curve Tracking of State-Transition Equations |
| 831 | -- | 843 | Xin Li, Yaping Zhan, Lawrence T. Pileggi. Quadratic Statistical MAX Approximation for Parametric Yield Estimation of Analog/RF Integrated Circuits |
| 844 | -- | 857 | Huang-Yu Chen, Mei-Fang Chiang, Yao-Wen Chang, Lumdo Chen, Brian Han. Full-Chip Routing Considering Double-Via Insertion |
| 858 | -- | 871 | Song Chen, Takeshi Yoshimura. Fixed-Outline Floorplanning: Block-Position Enumeration and a New Method for Calculating Area Costs |
| 872 | -- | 882 | Minsik Cho, Hua Xiang, Ruchir Puri, David Z. Pan. Track Routing and Optimization for Yield |
| 883 | -- | 892 | Bo Hu, C.-J. Richard Shi. Simulation of Closely Related Dynamic Nonlinear Systems With Application to Process-Voltage-Temperature Corner Analysis |
| 893 | -- | 905 | Diana Marculescu, Siddharth Garg. Process-Driven Variability Analysis of Single and Multiple Voltage-Frequency Island Latency-Constrained Systems |
| 906 | -- | 919 | Claudio Pinello, Luca P. Carloni, Alberto L. Sangiovanni-Vincentelli. Fault-Tolerant Distributed Deployment of Embedded Control Software |
| 920 | -- | 931 | Erkan Acar, Sule Ozev. Defect-Oriented Testing of RF Circuits |
| 932 | -- | 945 | Vishal J. Mehta, Malgorzata Marek-Sadowska, Kun-Han Tsai, Janusz Rajski. Improving the Resolution of Single-Delay-Fault Diagnosis |
| 946 | -- | 957 | Irith Pomeranz, Sudhakar M. Reddy. On the Saturation of n-Detection Test Generation by Different Definitions With Increased n |
| 958 | -- | 962 | Jeong-Ho Han, In-Cheol Park. FIR Filter Synthesis Considering Multiple Adder Graphs for a Coefficient |
| 963 | -- | 967 | Xiaojun Ma, Fabrizio Lombardi. Synthesis of Tile Sets for DNA Self-Assembly |
| 967 | -- | 972 | Bhaskar Pal, Ansuman Banerjee, Arnab Sinha, Pallab Dasgupta. Accelerating Assertion Coverage With Adaptive Testbenches |
| 973 | -- | 977 | Soheil Samii, Mikko Selkälä, Erik Larsson, Krishnendu Chakrabarty, Zebo Peng. Cycle-Accurate Test Power Modeling and Its Application to SoC Test Architecture Design and Scheduling |
| 977 | -- | 982 | Gülin Tulunay, Sina Balkir. A Synthesis Tool for CMOS RF Low-Noise Amplifiers |