| 1629 | -- | 1641 | Timothée Levi, Noëlle Lewis, Jean Tomas, Sylvie Renaud. Application of IP-Based Analog Platforms in the Design of Neuromimetic Integrated Circuits |
| 1642 | -- | 1655 | Dogan Fennibay, Arda Yurdakul, Alper Sen 0001. A Heterogeneous Simulation and Modeling Framework for Automation Systems |
| 1656 | -- | 1669 | Yi-Ling Hsieh, Tsung-Yi Ho, Krishnendu Chakrabarty. A Reagent-Saving Mixing Algorithm for Preparing Multiple-Target Biochemical Samples Using Digital Microfluidics |
| 1670 | -- | 1683 | Bing Li, Ning Chen, Ulf Schlichtmann. Statistical Timing Analysis for Latch-Controlled Circuits With Reduced Iterations and Graph Transformations |
| 1684 | -- | 1697 | Jongyoon Jung, Taewhan Kim. Variation-Aware False Path Analysis Based on Statistical Dynamic Timing Analysis |
| 1698 | -- | 1710 | Chuan Xu, Navin Srivastava, Roberto Suaya, Kaustav Banerjee. Fast High-Frequency Impedance Extraction of Horizontal Interconnects and Inductors in 3-D ICs With Multiple Substrates |
| 1711 | -- | 1722 | Wai-Kei Mak, Yu-Chen Lin, Chris Chu, Ting-Chi Wang. Pad Assignment for Die-Stacking System-in-Package Design |
| 1723 | -- | 1733 | Kuan-Hsien Ho, Jie-Hong Roland Jiang, Yao-Wen Chang. TRECO: Dynamic Technology Remapping for Timing Engineering Change Orders |
| 1734 | -- | 1742 | Irith Pomeranz. A Metric for Identifying Detectable Path Delay Faults |
| 1743 | -- | 1753 | Xiao Liu, Qiang Xu. On X-Variable Filling and Flipping for Capture-Power Reduction in Linear Decompressor-Based Test Compression Environment |
| 1754 | -- | 1766 | Xrysovalantis Kavousianos, Krishnendu Chakrabarty, Arvind Jain, Rubin A. Parekhji. Test Schedule Optimization for Multicore SoCs: Handling Dynamic Voltage Scaling and Multiple Voltage Islands |
| 1767 | -- | 1771 | Dongkeun Oh, Charlie Chung-Ping Chen, Yu Hen Hu. Efficient Thermal Simulation for 3-D IC With Thermal Through-Silicon Vias |
| 1772 | -- | 1776 | Subhankar Mukherjee, Pallab Dasgupta. Assertion Aware Sampling Refinement: A Mixed-Signal Perspective |
| 1776 | -- | 1781 | Subhankar Mukherjee, Pallab Dasgupta. Computing Minimal Debugging Windows in Failure Traces of AMS Assertions |
| 1781 | -- | 1786 | Rupesh S. Shelar. A Fast and Near-Optimal Clustering Algorithm for Low-Power Clock Tree Synthesis |