| 1893 | -- | 1907 | Pramod Kumar Meher, Javier Valls, Tso-Bing Juang, K. Sridharan, Koushik Maharatna. 50 Years of CORDIC: Algorithms, Architectures, and Applications |
| 1908 | -- | 1920 | Christopher S. Taillefer, Gordon W. Roberts. Delta-Sigma A/D Conversion Via Time-Mode Signal Processing |
| 1921 | -- | 1929 | Robert Rieger, Yen-Yow Pan. A High-Gain Acquisition System With Very Large Input Range |
| 1930 | -- | 1937 | Pere Palà-Schönwälder, F. Xavier Moncunill-Geniz, Jordi Bonet-Dalmau, Francisco del Águìla López, M. Rosa Giralt-Mas. Baseband Superregenerative Amplification |
| 1938 | -- | 1948 | Erick O. Torres, Erick A. Rincón-Mora. Electrostatic Energy-Harvesting and Battery-Charging CMOS System Prototype |
| 1949 | -- | 1959 | Bruno Pellegrini. Improved Feedback Theory |
| 1960 | -- | 1967 | Hsie-Chia Chang, Chien-Ching Lin, Fu-Ke Chang, Chen-Yi Lee. A Universal VLSI Architecture for Reed-Solomon Error-and-Erasure Decoders |
| 1968 | -- | 1978 | Davide De Caro, Nicola Petra, Antonio G. M. Strollo. High-Performance Special Function Unit for Programmable 3-D Graphics Processors |
| 1979 | -- | 1993 | Andrea Calimera, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino. Design of a Flexible Reactivation Cell for Safe Power-Mode Transition in Power-Gated Circuits |
| 1994 | -- | 2008 | Almir Mutapcic, Stephen P. Boyd, Srinivasan Murali, David Atienza, Giovanni De Micheli, Rajesh Gupta. Processor Speed Control With Thermal Constraints |
| 2009 | -- | 2019 | Ming-Der Shieh, Jun-Hong Chen, Wen-Ching Lin, Hao-Hsuan Wu. A New Algorithm for High-Speed Modular Multiplication Design |
| 2020 | -- | 2032 | Maged Ghoneima, Yehea I. Ismail, Muhammad M. Khellah, James Tschanz, Vivek De. Serial-Link Bus: A Low-Power On-Chip Bus Architecture |
| 2033 | -- | 2041 | Yun Bai, S. Simon Wong. Optimization of Driver Preemphasis for On-Chip Interconnects |
| 2042 | -- | 2054 | Bo Fu, Paul Ampadu. On Hamming Product Codes With Type-II Hybrid ARQ for On-Chip Interconnects |
| 2055 | -- | 2063 | Kwang-Hee Choi, Jung-Bum Shin, Jae-Yoon Sim, Hong June Park. An Interpolating Digitally Controlled Oscillator for a Wide-Range All-Digital PLL |
| 2064 | -- | 2074 | Hon Keung Kwan, Aimin Jiang. FIR, Allpass, and IIR Variable Fractional Delay Digital Filter Design |
| 2075 | -- | 2088 | Patrick Satarzadeh, Bernard C. Levy, Paul J. Hurst. Adaptive Semiblind Calibration of Bandwidth Mismatch for Two-Channel Time-Interleaved ADCs |
| 2089 | -- | 2099 | Tunde Wang, Dong Wang, Paul J. Hurst, Bernard C. Levy, Stephen H. Lewis. A Level-Crossing Analog-to-Digital Converter With Triangular Dither |
| 2100 | -- | 2108 | Yan-Wu Wang, Meng Yang, Hua O. Wang, Zhi-Hong Guan. Robust Stabilization of Complex Switched Networks With Parametric Uncertainties and Delays Via Impulsive Control |
| 2109 | -- | 2122 | Antonio Loría. Robust Linear Control of (Chaotic) Permanent-Magnet Synchronous Motors With Uncertainties |
| 2123 | -- | 2131 | Nima Sadeghi, Vincent C. Gaudet, Christian Schlegel. Analog DFT Processors for OFDM Receivers: Circuit Mismatch and System Performance Analysis |
| 2132 | -- | 2142 | Siew-Chong Tan, Svetlana Bronstein, Moshe Nur, Yuk-Ming Lai, Adrian Ioinovici, Chi Kong Tse. Variable Structure Modeling and Design of Switched-Capacitor Converters |