A Universal VLSI Architecture for Reed-Solomon Error-and-Erasure Decoders

Hsie-Chia Chang, Chien-Ching Lin, Fu-Ke Chang, Chen-Yi Lee. A Universal VLSI Architecture for Reed-Solomon Error-and-Erasure Decoders. IEEE Trans. on Circuits and Systems, 56-I(9):1960-1967, 2009. [doi]

Abstract

Abstract is missing.