Journal: IEEE Trans. on Circuits and Systems

Volume 56-I, Issue 9

1893 -- 1907Pramod Kumar Meher, Javier Valls, Tso-Bing Juang, K. Sridharan, Koushik Maharatna. 50 Years of CORDIC: Algorithms, Architectures, and Applications
1908 -- 1920Christopher S. Taillefer, Gordon W. Roberts. Delta-Sigma A/D Conversion Via Time-Mode Signal Processing
1921 -- 1929Robert Rieger, Yen-Yow Pan. A High-Gain Acquisition System With Very Large Input Range
1930 -- 1937Pere Palà-Schönwälder, F. Xavier Moncunill-Geniz, Jordi Bonet-Dalmau, Francisco del Águìla López, M. Rosa Giralt-Mas. Baseband Superregenerative Amplification
1938 -- 1948Erick O. Torres, Erick A. Rincón-Mora. Electrostatic Energy-Harvesting and Battery-Charging CMOS System Prototype
1949 -- 1959Bruno Pellegrini. Improved Feedback Theory
1960 -- 1967Hsie-Chia Chang, Chien-Ching Lin, Fu-Ke Chang, Chen-Yi Lee. A Universal VLSI Architecture for Reed-Solomon Error-and-Erasure Decoders
1968 -- 1978Davide De Caro, Nicola Petra, Antonio G. M. Strollo. High-Performance Special Function Unit for Programmable 3-D Graphics Processors
1979 -- 1993Andrea Calimera, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino. Design of a Flexible Reactivation Cell for Safe Power-Mode Transition in Power-Gated Circuits
1994 -- 2008Almir Mutapcic, Stephen P. Boyd, Srinivasan Murali, David Atienza, Giovanni De Micheli, Rajesh Gupta. Processor Speed Control With Thermal Constraints
2009 -- 2019Ming-Der Shieh, Jun-Hong Chen, Wen-Ching Lin, Hao-Hsuan Wu. A New Algorithm for High-Speed Modular Multiplication Design
2020 -- 2032Maged Ghoneima, Yehea I. Ismail, Muhammad M. Khellah, James Tschanz, Vivek De. Serial-Link Bus: A Low-Power On-Chip Bus Architecture
2033 -- 2041Yun Bai, S. Simon Wong. Optimization of Driver Preemphasis for On-Chip Interconnects
2042 -- 2054Bo Fu, Paul Ampadu. On Hamming Product Codes With Type-II Hybrid ARQ for On-Chip Interconnects
2055 -- 2063Kwang-Hee Choi, Jung-Bum Shin, Jae-Yoon Sim, Hong June Park. An Interpolating Digitally Controlled Oscillator for a Wide-Range All-Digital PLL
2064 -- 2074Hon Keung Kwan, Aimin Jiang. FIR, Allpass, and IIR Variable Fractional Delay Digital Filter Design
2075 -- 2088Patrick Satarzadeh, Bernard C. Levy, Paul J. Hurst. Adaptive Semiblind Calibration of Bandwidth Mismatch for Two-Channel Time-Interleaved ADCs
2089 -- 2099Tunde Wang, Dong Wang, Paul J. Hurst, Bernard C. Levy, Stephen H. Lewis. A Level-Crossing Analog-to-Digital Converter With Triangular Dither
2100 -- 2108Yan-Wu Wang, Meng Yang, Hua O. Wang, Zhi-Hong Guan. Robust Stabilization of Complex Switched Networks With Parametric Uncertainties and Delays Via Impulsive Control
2109 -- 2122Antonio Loría. Robust Linear Control of (Chaotic) Permanent-Magnet Synchronous Motors With Uncertainties
2123 -- 2131Nima Sadeghi, Vincent C. Gaudet, Christian Schlegel. Analog DFT Processors for OFDM Receivers: Circuit Mismatch and System Performance Analysis
2132 -- 2142Siew-Chong Tan, Svetlana Bronstein, Moshe Nur, Yuk-Ming Lai, Adrian Ioinovici, Chi Kong Tse. Variable Structure Modeling and Design of Switched-Capacitor Converters

Volume 56-I, Issue 8

1541 -- 1553Jonne Poikonen, Ari Paasio. An 8times 8 Cell Analog Order-Statistic-Filter Array With Asynchronous Grayscale Morphology in 0.13-muhboxm CMOS
1554 -- 1565Rocío Maldonado-López, Fernando Vidal-Verdú, Gustavo Liñán, Ángel Rodríguez-Vázquez. Integrated Circuitry to Detect Slippage Inspired by Human Skin and Artificial Retinas
1566 -- 1575Timothy K. Horiuchi. A Low-Power Visual-Horizon Estimation Chip
1576 -- 1589Francesco Cannillo, Chris Toumazou. Subthreshold Parallel FM-to-Digital Delta- Sigma Converter With Output-Bit-Stream Addition by Interleaving
1590 -- 1597Takeshi Ito, Kenichi Okada, Kazuya Masu. Characterization of On-Chip Multiport Inductors for Small-Area RF Circuits
1598 -- 1611Francesco Cannillo, Christofer Toumazou, Tor Sverre Lande. Nanopower Subthreshold MCML in Submicrometer CMOS Technology
1612 -- 1621Volodymyr Kratyuk, Pavan Kumar Hanumolu, Kerem Ok, Un-Ku Moon, Kartikeya Mayaram. A Digital PLL With a Stochastic Time-to-Digital Converter
1622 -- 1634Jussi-Pekka Jansson, Antti Mäntyniemi, Juha Kostamovaara. Synchronization in a Multilevel CMOS Time-to-Digital Converter
1635 -- 1644Hungwen Lu, Hsin-Wen Wang, Chauchin Su, Chien-Nan Jimmy Liu. Design of an All-Digital LVDS Driver
1645 -- 1656Seung-Jun Bae, Hyung-Joon Chi, Young-Soo Sohn, Jae-Seung Lee, Jae-Yoon Sim, Hong June Park. A 2-Gb/s CMOS Integrating Two-Tap DFE Receiver for Four-Drop Single-Ended Signaling
1657 -- 1667Meng-Fan Chang, Su-Meng Yang, Kuang-Ting Chen. DD Embedded Asynchronous SRAM With Dual-Mode Self-Timed Technique for Dynamic Voltage Systems
1668 -- 1680Omar Nibouche, Said Boussakta, Michael Darnell. Pipeline Architectures for Radix-2 New Mersenne Number Transform
1681 -- 1688Tian-Bo Deng. Robust Structure Transformation for Causal Lagrange-Type Variable Fractional-Delay Filters
1689 -- 1707Bosco H. Leung, Don McLeish. Phase Noise of a Class of Ring Oscillators Having Unsaturated Outputs With Focus on Cycle-to-Cycle Correlation
1708 -- 1719Kirill Kozmin, Jonny Johansson, Jerker Delsing. Level-Crossing ADC Performance Evaluation Toward Ultrasound Application
1720 -- 1731Ali Zemouche, Mohamed Boutayeb. infty Synchronization and Unknown Input Recovery
1732 -- 1743Mohammad Al-Khaleel, Albert E. Ruehli, Martin J. Gander. Optimized Waveform Relaxation Methods for Longitudinal Partitioning of Transmission Lines
1744 -- 1757Deyuan Meng, Yingmin Jia, Junping Du, Fashan Yu. Robust Design of a Class of Time-Delay Iterative Learning Control Systems With Initial Shifts
1758 -- 1771Edward A. Keehr, Ali Hajimiri. Analysis of Internally Bandlimited Multistage Cubic-Term Generators for RF Receivers
1772 -- 1782Caroline Lelandais-Perrault, Tudor Petrescu, Daniel Poulton, Pierre Duhamel, Jacques Oksman. Wideband, Bandpass, and Versatile Hybrid Filter Bank A/D Conversion for Software Radio
1783 -- 1785Shahriar Mirabbasi, Gennady Gildenblat, Wouter A. Serdijn. Guest Editorial Special Section on 2008 IEEE Custom Integrated Circuits Conference
1786 -- 1793Behzad Razavi. The Role of PLLs in Future Wireline Transmitters
1794 -- 1806Anthony Chan Carusone, Horace Cheng, Faisal A. Musa. A 32/16-Gb/s Dual-Mode Pulsewidth Modulation Pre-Emphasis (PWM-PE) Transmitter With 30-dB Loss Compensation Using a High-Speed CML Design Methodology
1807 -- 1817Junyoung Park, Joshua Jaeyoung Kang, Sunghyun Park, Michael P. Flynn. A 9-Gbit/s Serial Transceiver for On-Chip Global Signaling Over Lossy Transmission Lines
1818 -- 1829Sudip Shekhar, Ganesh Balamurugan, David J. Allstot, Mozhgan Mansuri, James E. Jaussi, Randy Mooney, Joseph T. Kennedy, Bryan Casper, Frank O'Mahony. Strong Injection Locking in Low- Q LC Oscillators: Modeling and Application in a Forwarded-Clock I/O Receiver
1830 -- 1843Zahra Safarian, Hossein Hashemi. Wideband Multi-Mode CMOS VCO Design Using Coupled Inductors
1844 -- 1857Jaeha Kim, Brian S. Leibowitz, Jihong Ren, Chris J. Madden. Simulation and Analysis of Random Decision Errors in Clocked Comparators
1858 -- 1869Jooyoung Song, Bo Yu, Yu Yuan, Yuan Taur. A Review on Compact Modeling of Multiple-Gate MOSFETs
1870 -- 1883Hugh J. Barnaby, Michael L. McLain, Ivan S. Esqueda, Xiao J. Chen. Modeling Ionizing Radiation Effects in Solid State Materials and CMOS Devices
1884 -- 1891Kurt Ronse, Philippe Jansen, Roel Gronheid, Eric Hendrickx, Mireille Maenhoudt, Vincent Wiaux, Mieke Goethals, R. Jonckheere, Geert Vandenberghe. Lithography Options for the 32 nm Half Pitch Node and Beyond

Volume 56-I, Issue 7

1301 -- 1312Yanyi Liu Wong, Marc H. Cohen, Pamela Abshire. A 750-MHz 6-b Adaptive Floating-Gate Quantizer in 0.35-μm CMOS
1313 -- 1325Esther Rodríguez-Villegas, Min Xu. Simplifying the Design of ΣΔModulators Using FGMOS Transistors
1326 -- 1338Gildas Leger, Adoración Rueda. Low-Cost Digital Detection of Parametric Faults in Cascaded SigmaDelta Modulators
1339 -- 1348Mohammad M. Ahmadi, Graham A. Jullien. Current-Mirror-Based Potentiostats for Three-Electrode Amperometric Electrochemical Sensors
1349 -- 1359Bah-Hwee Gwee, Joseph S. Chang, Yiqiong Shi, Chien-Chung Chua, Kwen-Siong Chong. A Low-Voltage Micropower Asynchronous Multiplier With Shift-Add Multiplication Approach
1360 -- 1372Jung-Lang Yu, Yin-Cheng Lin. Space-Time-Coded MIMO ZP-OFDM Systems: Semiblind Channel Estimation and Equalization
1373 -- 1382Torsten Djurhuus, Viktor Krozer, Jens Vidkjær, Tom K. Johansen. Oscillator Phase Noise: A Geometrical Approach
1383 -- 1390Luca Rossi 0002, Steve Tanner, Pierre-André Farine. Performance Analysis of a Hybrid Incremental and Cyclic A/D Conversion Principle
1391 -- 1404Maiying Zhong, Qing-Long Han. Fault-Tolerant Master-Slave Synchronization for Lur'e Systems Using Time-Delay Feedback Control
1405 -- 1415Yunong Zhang, Weimu Ma, Binghuang Cai. From Zhang Neural Network to Newton Iteration for Matrix Inversion
1416 -- 1426Yang Yi, Lei Guo, Hong Wang. Constrained PI Tracking Control for Output Probability Distributions Based on Two-Step Neural Networks
1428 -- 1441Myeong-Eun Hwang, Seong-Ook Jung, Kaushik Roy. Slope Interconnect Effort: Gate-Interconnect Interdependent Delay Modeling for Early CMOS Circuit Simulation
1441 -- 1454Bor-Sen Chen, Wen-Hao Chen, Hsuan-Liang Wu. infty Global Linearization Filter Design for Nonlinear Stochastic Systems
1455 -- 1466Donald Y. C. Lie, Jerry Lopez, Jeremy D. Popp, Jason F. Rowland, Guogong Wang, Guoxuan Qin, Zhenqiang Ma. Highly Efficient Monolithic Class E SiGe Power Amplifier Design at 900 and 2400 MHz
1467 -- 1477Chinmaya Mishra, Alberto Valdes-Garcia, Edgar Sánchez-Sinencio, José Silva-Martínez. System and Circuit Design for an MB-OFDM UWB Frequency Synthesizer
1478 -- 1487Jesús Arias, Luis Quintanilla, Jokin Segundo, Lourdes Enríquez, José Vicente, Jesús M. Hernández-Mangas. Parallel Continuous-Time DeltaSigma ADC for OFDM UWB Receivers
1488 -- 1499Ville Saari, Mikko Kaltiokallio, Saska Lindfors, Jussi Ryynänen, Kari Halonen. A 240-MHz Low-Pass Filter With Variable Gain in 65-nm CMOS for a UWB Radio Receiver
1500 -- 1512Michaël Pelissier, Dominique Morche, Pierre Vincent. Super-Regenerative Architecture for UWB Pulse Detection: From Theory to RF Front-End Design
1513 -- 1524Ahmad Mirzaei, Saeed Chehrazi, Rahim Bagheri, Asad A. Abidi. A Second-Order Antialiasing Prefilter for a Software-Defined Radio Receiver
1525 -- 1538Yair Linn. A Carrier-Independent Non-Data-Aided Real-Time SNR Estimator for M-PSK and D-MPSK Suitable for FPGAs and ASICs

Volume 56-I, Issue 6

1077 -- 1087Jesús Ruiz-Amaya, Manuel Delgado-Restituto, Ángel Rodríguez-Vázquez. Accurate Settling-Time Modeling and Design Procedures for Two-Stage Miller-Compensated Amplifiers for Switched-Capacitor Circuits
1088 -- 1101Arthur Nieuwoudt, Tamer Ragheb, Hamid Nejati, Yehia Massoud. Numerical Design Optimization Methodology for Wideband and Multi-Band Inductively Degenerated Cascode CMOS Low Noise Amplifiers
1102 -- 1114Chung-Yi Wang, Jieh-Tsorng Wu. A Multiphase Timing-Skew Calibration Technique Using Zero-Crossing Detection
1115 -- 1124David Marche, Yvon Savaria, Yves Gagnon. An Improved Switch Compensation Technique for Inverted R-2R Ladder DACs
1125 -- 1133Alex Jianzhong Chen, Yong Ping Xu. Multibit Delta-Sigma Modulator With Noise-Shaping Dynamic Element Matching
1134 -- 1145Philip M. Chopp, Anas A. Hamoui. Analysis of Clock-Jitter Effects in Continuous-Time Delta Sigma Modulators Using Discrete-Time Models
1146 -- 1159Mauricio Yanez, John C. Cartledge. Synthesis of Distributed Phase-Locked Oscillators
1160 -- 1172Chin-Cheng Kuo, Meng-Jung Lee, Chien-Nan Jimmy Liu, Ching-Ji Huang. Fast Statistical Analysis of Process Variation Effects Using Accurate PLL Behavioral Models
1173 -- 1181David C. Yates, Andrew S. Holmes. Preferred Transmission Frequency for Size-Constrained Ultralow-Power Short-Range CMOS Oscillator Transmitters
1182 -- 1191Prosenjit Mal, Prerna D. Patel, Fred R. Beyette Jr.. Design and Demonstration of a Fully Integrated Multi-Technology FPGA: A Reconfigurable Architecture for Photonic and Other Multi-Technology Applications
1192 -- 1201Yajuan He, Chip-Hong Chang. n-Bit Multiplier Design
1202 -- 1213Dimitrios M. Schinianakis, Apostolos P. Fournaris, Harris E. Michail, Athanasios P. Kakarountas, Thanos Stouraitis. p Elliptic Curve Point Multiplier
1214 -- 1220Shizhong Mei, Yehea I. Ismail. Stable Parallelizable Model Order Reduction for Circuits With Frequency-Dependent Elements
1221 -- 1230Young-Deok Kim, Hyun-Seok Ahn, Suhwan Kim, Deog Kyoon Jeong. A High-Speed Range-Matching TCAM for Storage-Efficient Packet Classification
1231 -- 1240Victor M. Preciado, George C. Verghese. Low-Order Spectral Analysis of the Kirchhoff Matrix for a Probabilistic Graph With a Prescribed Expected Degree Sequence
1241 -- 1247Baoyong Zhang, Shengyuan Xu, Guangdeng Zong, Yun Zou. Delay-Dependent Exponential Stability for Uncertain Stochastic Hopfield Neural Networks With Time-Varying Delays
1248 -- 1259Wu-Hua Chen, Wei Xing Zheng. Global Exponential Stability of Impulsive Neural Networks With Variable Delay: An LMI Approach
1260 -- 1271Hassan El Fadil, Fouad Giri, Fatima-Zahra Chaoui, Ouadia El Magueri. Accounting for Input Limitation in the Control of Buck Power Converters
1272 -- 1285Jie Chen 0019, Yongru Gu, Keshab K. Parhi. Novel FEXT Cancellation and Equalization for High Speed Ethernet Transmission
1286 -- 1296Yuehui Huang, Chi Kong Tse, Xinbo Ruan. General Control Considerations for Input-Series Connected DC/DC Converters

Volume 56-I, Issue 5

861 -- 864Anthony Chan Carusone, Yehea Ismail, Un-Ku Moon, Hanspeter Schmid, Wouter A. Serdijn, Gianluca Setti. Guest Editorial Special Issue on ISCAS 2008
865 -- 876Jae Y. Kim, Chih-Wei Yao, Alan N. Willson Jr.. vco Compensation
877 -- 885Tsung-Hsien Lin, Ching-Lung Ti, Yao-Hong Liu. Dynamic Current-Matching Charge Pump and Gated-Offset Linearization Technique for Delta-Sigma Fractional- N PLLs
886 -- 893Erkan Bilhan, Franco Maloberti. A Wideband Sigma-Delta Modulator With Cross-Coupled Two-Paths
894 -- 901Seung-Hoon Lee, Young-Ju Kim, Hee-Cheol Choi, Gil-Cho Ahn. A 1.2-V 12-b 120-MS/s SHA-Free Dual-Channel Nyquist ADC Based on Midcode Calibration
902 -- 910Manar El-Chammas, Boris Murmann. General Analysis on the Impact of Phase-Skew in Time-Interleaved ADCs
911 -- 919Jun He, Sanyi Zhan, Degang Chen, Randall L. Geiger. Analyses of Static and Dynamic Random Offset Voltages in Dynamic Comparators
920 -- 932Davide Ponton, Pierpaolo Palestri, David Esseni, Luca Selmi, Marc Tiebout, Bertrand Parvais, Domagoj Siprak, Gerhard Knoblinger. Design of Ultra-Wideband Low-Noise Amplifiers in 45-nm CMOS Technology: Comparison Between Planar Bulk and SOI FinFET Devices
933 -- 942Pui-In Mak, Rui Paulo Martins. Design of an ESD-Protected Ultra-Wideband LNA in Nanoscale CMOS for Full-Band Mobile TV Tuners
943 -- 956Michael S. McCorquodale, Gordon A. Carichner, Justin D. O'Day, Scott M. Pernia, Sundus Kubba, Eric D. Marsman, Jonathan J. Kuhn, Richard B. Brown. A 25-MHz Self-Referenced Solid-State Frequency Source Suitable for XO-Replacement
957 -- 965Roger Dura, Fabrice Mathieu, Liviu Nicu, Francesc Pérez-Murano, Francisco Serra-Graells. A 0.3-mW/Ch 1.25 V Piezo-Resistance Digital ROIC for Liquid-Dispensing MEMS
966 -- 974Tzu-Ming Wang, Ming-Dou Ker, Hung-Tai Liao. Design of Mixed-Voltage-Tolerant Crystal Oscillator Circuit in Low-Voltage CMOS Technology
975 -- 986Somashekar Bangalore Prakash, Pamela Abshire. A Fully Differential Rail-to-Rail CMOS Capacitance Sensor With Floating-Gate Trimming for Mismatch Compensation
987 -- 996Josep Maria Margarit, Lluís Terés, Francisco Serra-Graells. A Sub-muhboxW Fully Tunable CMOS DPS for Uncooled Infrared Fast Imaging
997 -- 1004Emre Salman, Eby G. Friedman, Radu M. Secareanu, Olin L. Hartin. Worst Case Power/Ground Noise Estimation Using an Equivalent Transition Time for Resonance
1005 -- 1016Cheng-Hung Lin, Chun-Yu Chen, Tsung-Han Tsai, An-Yeu Wu. Low-Power Memory-Reduced Traceback MAP Decoding for Double-Binary Convolutional Turbo Decoder
1017 -- 1029Tyler L. Brandon, John C. Koob, Leendert van den Berg, Zhengang Chen, Amirhossein Alimohammad, Ramkrishna Swamy, Jason Klaus, Stephen Bates, Vincent C. Gaudet, Bruce F. Cockburn, Duncan G. Elliott. A Compact 1.1-Gb/s Encoder and a Memory-Based 600-Mb/s Decoder for LDPC Convolutional Codes
1030 -- 1040Andrea Gerosa, Silvia Soldà, Andrea Bevilacqua, Daniele Vogrig, Andrea Neviani. An Energy-Detector for Noncoherent Impulse-Radio UWB Receivers
1041 -- 1052Salvatore Drago, Fabio Sebastiano, Lucien J. Breems, Domine Leenaerts, Kofi A. A. Makinwa, Bram Nauta. Impulse-Based Scheme for Crystal-Less ULP Radios
1053 -- 1062Jeongwon Cha, Minsik Ahn, Changhyuk Cho, Chang-Ho Lee, Haksun Kim, Joy Laskar. Analysis and Design Techniques of CMOS Charge-Pump-Based Radio-Frequency Antenna-Switch Controllers
1063 -- 1072Seulki Lee, Jerald Yoo, Hoi-Jun Yoo. A 200-Mbps 0.02-nJ/b Dual-Mode Inductive Coupling Transceiver for cm-Range Multimedia Application

Volume 56-I, Issue 4

705 -- 713Hsiao-Chin Chen, Tao Wang, Hung-Wei Chiu, Yu-Che Yang, Tze-Huei Kao, Guo-Wei Huang, Shey-Shi Lu. A 5-GHz-Band CMOS Receiver With Low LO Self-Mixing Front End
714 -- 726Zhipeng Ye, Michael Peter Kennedy. Hardware Reduction in Digital Delta-Sigma Modulators Via Error Masking - Part I: MASH DDSM
727 -- 739George Jie Yuan. Modeling, Quantitative Analysis, and Design of Switched-Current Pipeline A/D Converters
740 -- 753Thomas William Brown, Mikko Hakkarainen, Terri S. Fiez. Frequency-Dependent Sampling Linearity
754 -- 762Luz Balado, Emili Lupon, Joan Figueras, Miquel Roca, Eugeni Isern, Rodrigo Picos. Verifying Functional Specifications by Regression Techniques on Lissajous Test Signatures
763 -- 772Tzung-Je Lee, Tieh-Yen Chang, Chua-Chin Wang. Wide-Range 5.0/3.3/1.8-V I/O Buffer Using 0.35-m 3.3-V CMOS Technology
773 -- 783An Hu, Fei Yuan. Intersignal Timing Skew Compensation of Parallel Links With Voltage-Mode Incremental Signaling
784 -- 794Jiasong Wu, Huazhong Shu, Lotfi Senhadji, Limin Luo. Mixed-Radix Algorithm for the Computation of Forward and Inverse MDCTs
795 -- 805Saad Bouguezel, M. Omair Ahmad, M. N. S. Swamy. A New Class of Reciprocal-Orthogonal Parametric Transforms
806 -- 819Tommaso Addabbo, Ada Fort, Duccio Papini, Santina Rocchi, Valerio Vignoli. Invariant Measures of Tunable Chaotic Sources: Robustness Analysis and Efficient Estimation
820 -- 828Ajeesh P. Kurian, Henry Leung. Weak Signal Estimation in Chaotic Clutter Using Model-Based Coupled Synchronization
829 -- 839Wei Wu, Wenjuan Zhou, Tianping Chen. Cluster Synchronization of Linearly Coupled Complex Networks Under Pinning Control
840 -- 845Cheng Juang, Chin-Lung Li, Yu-Hao Liang, Jonq Juang. Wavelet Transform Method for Coupled Map Lattices
846 -- 857He Huang, Gang Feng. 2 Filtering for Delayed Neural Networks

Volume 56-I, Issue 3

509 -- 518Timmy Sundström, Boris Murmann, Christer Svensson. Power Dissipation Bounds for High-Speed Nyquist Analog-to-Digital Converters
519 -- 528Vinita Vasudevan. Analysis of Clock Jitter in Continuous-Time Sigma-Delta Modulators
529 -- 540Walid K. M. Ahmed. Quantization Noise Suppression in Digitally Segmented Amplifiers
541 -- 553Todd Sepke, Peter Holloway, Charles Sodini, Hae-Seung Lee. Noise Analysis for Comparator-Based Circuits
554 -- 565Jaehoon Song, Hyunbean Yi, Juhee Han, Sungju Park. An Efficient SoC Test Technique by Reusing On/Off-Chip Bus Bridge
566 -- 573Nitin Mohan, Wilson Fung, Derek Wright, Manoj Sachdev. A Low-Power Ternary CAM With Positive-Feedback Match-Line Sense Amplifiers
574 -- 582Jong-Jy Shyu, Soo-Chang Pei, Yun-Da Huang. Design of Variable Two-Dimensional FIR Digital Filters by McClellan Transformation
583 -- 593Aimin Jiang, Hon Keung Kwan. IIR Digital Filter Design With New Stability Constraint Based on Argument Principle
594 -- 603Paolo Maffezzoni. A Versatile Time-Domain Approach to Simulate Oscillators in RF Circuits
604 -- 615Yu Liang, Horacio J. Marquez. Robust Gain Scheduling Synchronization Method for Quadratic Chaotic Systems With Channel Time Delay
616 -- 629Huaguang Zhang, Zhanshan Wang, Derong Liu. Global Asymptotic Stability and Robust Stability of a Class of Cohen-Grossberg Neural Networks With Mixed Delays
630 -- 643Kang Li, Jian Xun Peng, Er-Wei Bai. Two-Stage Mixed Discrete-Continuous Identification of Radial Basis Function (RBF) Neural Models for Nonlinear Systems
644 -- 652Ran Yang, Lorenzo Ntogramatzidis, Michael Cantoni. On the Realization of 2-D Linear Systems With Recursively Computable Latent Variable Models
653 -- 663Qin Li, Qingling Zhang, Na Yi, Yuhao Yuan. Robust Passive Control for Uncertain Time-Delay Singular Systems
664 -- 672Fuwen Yang, Zidong Wang, Gang Feng, Xiaohui Liu. Robust Filtering With Randomly Varying Sensor Delay: The Finite-Horizon Case
673 -- 684Giulio Antonini, Pierdomenico Pepe. Input-to-State Stability Analysis of Partial-Element Equivalent-Circuit Models
685 -- 698Chester Sungchung Park, Keshab K. Parhi, Sin-Chong Park. Probabilistic Spherical Detection and VLSI Implementation for Multiple-Antenna Systems

Volume 56-I, Issue 2

285 -- 293Sumio Masuda, Takamoto Watanabe, Shigenori Yamauchi, Tomohito Terasawa. All-Digital Quadrature Detection With TAD for Radio-Controlled Clocks/Watches
294 -- 306John A. McNeill, Michael C. W. Coln, D. Richard Brown, Brian J. Larivee. Digital Background-Calibration Algorithm for "Split ADC" Architecture
307 -- 319Tsung-Heng Tsai, Paul J. Hurst, Stephen H. Lewis. Correction of Mismatches in a Time-Interleaved Analog-to-Digital Converter in an Adaptively Equalized Digital Communication Receiver
320 -- 326Ping-Yuan Deng, Jean-Fu Kiang. A 5-GHz CMOS Frequency Synthesizer With an Injection-Locked Frequency Divider and Differential Switched Capacitors
327 -- 336Tonse Laxminidhi, Venkata Prasadu, Shanthi Pavan. RC Filters in CMOS Technology
337 -- 349Victor Adrian, Joseph S. Chang, Bah-Hwee Gwee. A Low-Voltage Micropower Digital Class-D Amplifier Modulator for Hearing Aids
350 -- 363José M. Quintana, Maria J. Avedillo, Juan Núñez, Héctor Pettenghi. Operation Limits for RTD-Based MOBILE Circuits
364 -- 373Davide De Caro, Nicola Petra, Antonio G. M. Strollo. Digital Synthesizer/Mixer With Hybrid CORDIC-Multiplier Architecture: Error Analysis and Optimization
374 -- 383Tamer Ragheb, Andrew J. Ricketts, Mosin Mondal, Sami Kirolos, Greg M. Link, Vijaykrishnan Narayanan, Yehia Massoud. Design of Thermally Robust Clock Trees Using Dynamically Adaptive Clock Buffers
384 -- 394Maged Ghoneima, Yehea I. Ismail, Muhammad M. Khellah, Vivek De. SSMCB: Low-Power Variation-Tolerant Source-Synchronous Multicycle Bus
395 -- 404Jong-Jy Shyu, Soo-Chang Pei, Yun-Da Huang. Two-Dimensional Farrow Structure and the Design of Variable Fractional-Delay 2-D FIR Digital Filters
405 -- 415Slobodan Kozic, Martin Hasler. Low-Density Codes Based on Chaotic Systems for Simple Encoding
416 -- 429Wai Man Tam, Francis Chung-Ming Lau, Chi Kong Tse. Complex-Network Modeling of a Call Network
430 -- 439Alexander L. Fradkov, Boris R. Andrievsky, Robin J. Evans. Synchronization of Passifiable Lurie Systems Via Limited-Capacity Communication Channel
440 -- 452Chung-Yu Wu, Sheng-Hao Chen. The Design and Analysis of a CMOS Low-Power Large-Neighborhood CNN With Propagating Connections
453 -- 459J. M. Nichols. Frequency Distortion of Second- and Third-Order Phase-Locked Loop Systems Using a Volterra-Series Approximation
460 -- 472Augusto Sarti, Giovanni De Sanctis. Systematic Methods for the Implementation of Nonlinear Wave-Digital Structures
473 -- 484Georgios Takos, Christoforos N. Hadjicostis. Nonconcurrent Error Correction in the Presence of Roundoff Noise
485 -- 496Chien-Jen Huang, Chung-Wen Yu, Hsi-Pin Ma. A Power-Efficient Configurable Low-Complexity MIMO Detector
497 -- 507Ann Monté, Jan Doutreloigne, André Van Calster. Driving-Scheme Algorithms for Intelligent Energy-Efficient High-Voltage Display Drivers

Volume 56-I, Issue 12

2529 -- 2532Gianluca Setti. Editorial: A Few Comments Before Leaving the Helm
2533 -- 2543Hsin-Liang Chen, Po-Sheng Chen, Jen-Shiun Chiang. A Low-Offset Low-Noise Sigma-Delta Modulator With Pseudorandom Chopper-Stabilization Technique
2544 -- 2555Jaeha Kim, Jeong-Kyoum Kim, Bong-Joon Lee, Deog Kyoon Jeong. Design Optimization of On-Chip Inductive Peaking Structures for 0.13-μm CMOS 40-Gb/s Transmitter Circuits
2556 -- 2568Saeed Chehrazi, Ahmad Mirzaei, Asad A. Abidi. Second-Order Intermodulation in Current-Commutating Passive FET Mixers
2569 -- 2582Andrea Pugliese 0002, Francesco A. Amoroso, Gregorio Cappuccino, Giuseppe Cocorullo. Settling Time Optimization for Three-Stage CMOS Amplifier Topologies
2583 -- 2596Edward K. Lee, Eusebiu Matei, John Gord, Phil Hess, Patrick Nercessian, Howard Stover, Taihu Li, James Wolfe. A Biomedical Implantable FES Battery-Powered Micro-Stimulator
2597 -- 2608Mark Tuckwell, Christos Papavassiliou. An Analog Gabor Transform Using Sub-Threshold 180-nm CMOS Devices
2609 -- 2620Christian Spagnol, Emanuel M. Popovici, William P. Marnane. m) LDPC Decoders
2621 -- 2633Ya Jun Yu, Dong Shi, Yong Ching Lim. Design of Extrapolated Impulse Response FIR Filters With Residual Compensation in Subexpression Space
2634 -- 2643Mario Garrido, Keshab K. Parhi, Jesús Grajal. A Pipelined FFT Architecture for Real-Valued Signals
2644 -- 2654Ju-Hong Lee, Yuan-Hau Yang. Two-Channel Quincunx QMF Banks Using Two-Dimensional Digital Allpass Filters
2655 -- 2668Ravi-Kiran Gopalan, Oliver M. Collins. An Optimization Approach to Single-Bit Quantization
2669 -- 2677Payam M. Farahabadi, Hossein Miar Naimi, Ataollah Ebrahimzadeh. Closed-Form Analytical Equations for Amplitude and Frequency of High-Frequency CMOS Ring Oscillators
2678 -- 2688Manuel Dominguez. Energy Efficiency of Pulsed Actuations on Linear Resonators
2689 -- 2702Bin Liu 0003, David J. Hill, Jian Yao. Global Uniform Synchronization With Estimated Error Under Transmission Channel Noise
2703 -- 2716Antonio Loría, Elena Panteley, Arturo Zavala-Río. Adaptive Observers With Persistency of Excitation for Synchronization of Chaotic Systems
2717 -- 2727Martin Schubert. An Analog-Node Model for VHDL-Based Simulation of RF Integrated Circuits
2728 -- 2737Cameron T. Charles, David J. Allstot. A Calibrated Phase and Amplitude Control System for a 1.9 GHz Phased-Array Transmitter Element
2738 -- 2748Chia-Pei Chen, Ming-Jen Yang, Hsun-Hsiu Huang, Tung-Ying Chiang, Jheng-Liang Chen, Ming-Chieh Chen, Kuei-Ann Wen. A Low-Power 2.4-GHz CMOS GFSK Transceiver With a Digital Demodulator Using Time-to-Digital Conversion
2749 -- 2759Jaber A. Abu-Qahouq, Wisam Al-Hoor, Wasfy Mikhael, Lilly Huang, Issa Batarseh. Analysis and Design of an Adaptive-Step-Size Digital Controller for Switching Frequency Autotuning

Volume 56-I, Issue 11

2373 -- 2383Tzung-Han Wu, Jin-Siang Syu, Chinchun Meng. Analysis and Design of the 0.13- muhboxm CMOS Shunt-Series Series-Shunt Dual-Feedback Amplifier
2384 -- 2392Norihiro Takahashi, Kazuhide Fujita, Tadashi Shibata. A Pixel-Parallel Self-Similitude Processing for Multiple-Resolution Edge-Filtering Analog Image Sensors
2393 -- 2401Timothy K. Horiuchi. A Spike-Latency Model for Sonar-Based Navigation in Obstacle Fields
2402 -- 2410Nicolas Duchaux, Cyril Lahuec, Matthieu Arzel, Fabrice Seguin. Analog Decoder Performance Degradation Due to BJTs' Parasitic Elements
2411 -- 2424I-Chyn Wey, You-Gang Chen, Changhong Yu, An-Yeu Wu, Jie Chen. Design and Implementation of Cost-Effective Probabilistic-Based Noise-Tolerant VLSI Circuits
2425 -- 2438Jie Liu, Yuriy V. Zakharov, Ben Weaver. Architecture and FPGA Design of Dichotomous Coordinate Descent Algorithms
2439 -- 2448Liming Xiu. A Fast and Power-Area-Efficient Accumulator for Flying-Adder Frequency Synthesizer
2449 -- 2462Ioannis Kouretas, Vassilis Paliouras. A Low-Complexity High-Radix RNS Multiplier
2463 -- 2475Christian Vogel, Stefan Mendel. A Flexible and Scalable Structure to Compensate Frequency Response Mismatches in Time-Interleaved ADCs
2476 -- 2486Damián Marelli, Kaushik Mahata, Minyue Fu. Linear LMS Compensation for Timing Mismatch in Time-Interleaved ADCs
2487 -- 2497Viral K. Parikh, Poras T. Balsara, Oren E. Eliezer. All Digital-Quadrature-Modulator Based Wideband Wireless Transmitters
2498 -- 2510Baoyong Chi, Jinke Yao, Patrick Chiang, Zhihua Wang. A 0.18-muhboxm CMOS GFSK Analog Front End Using a Bessel-Based Quadrature Discriminator With On-Chip Automatic Tuning
2511 -- 2518Lechang Liu, Makoto Takamiya, Tsuyoshi Sekitani, Yoshiaki Noguchi, Shintaro Nakano, Koichiro Zaitsu, Tadahiro Kuroda, Takao Someya, Takayasu Sakurai. A 107-pJ/bit 100-kb/s 0.18- muhboxm Capacitive-Coupling Transceiver With Data Edge Signaling and DC Power-Free Pulse Detector for Printable Communication Sheet
2519 -- 2528Davide Brunelli, Clemens Moser, Lothar Thiele, Luca Benini. Design of a Solar-Harvesting Circuit for Batteryless Embedded Systems

Volume 56-I, Issue 10

2145 -- 2158Lucía Acosta, M. Jiménez, Ramón González Carvajal, Antonio J. López-Martín, Jaime Ramírez-Angulo. Highly Linear Tunable CMOS Gmhbox-C Low-Pass Filter
2159 -- 2172Carsten Wulff, Trond Ytterdal. Resonators in Open-Loop Sigma-Delta Modulators
2173 -- 2180Andrea Mazzanti, Pietro Andreani. 3 Phase Noise in CMOS Parallel LC -Tank Quadrature Oscillators
2181 -- 2194Shih Yu Chang, Hsiao-Chun Wu, Frank Neubrander, Jose C. Principe. Theories, Analysis, and Bounds of the Finite-Support Approximation for the Inverses of Mixing-Phase FIR Systems
2195 -- 2206Soo-Chang Pei, Huei-Shan Lin. Tunable FIR and IIR Fractional-Delay Filter Design and Structure Based on Complex Cepstrum
2207 -- 2220Tian-Bo Deng. Generalized WLS Method for Designing All-Pass Variable Fractional-Delay Digital Filters
2221 -- 2233S. H. Zhao, S. C. Chan. Design and Multiplierless Realization of Digital Synthesis Filters for Hybrid-Filter-Bank A/D Converters
2234 -- 2247Yong Ching Lim, Yuexian Zou, Jun Wei Lee, Shing-Chow Chan. Time-Interleaved Analog-to-Digital-Converter Compensation Using Multichannel Filters
2248 -- 2258Philippe Bénabès. Accurate Time-Domain Simulation of Continuous-Time Sigma-Delta Modulators
2259 -- 2269Mika Laiho, Victor M. Brea, Ari Paasio. Effect of Mismatch on the Reliability of ON/OFF-Programmable CNNs
2270 -- 2279Stefano Pastore. Fast and Efficient Search for All DC Solutions of PWL Circuits by Means of Oversized Polyhedra
2280 -- 2291Ke-Zan Li, Ming-Chao Zhao, Xin-Chu Fu. Projective Synchronization of Driving-Response Systems and Its Application to Secure Communication
2292 -- 2300Kenneth C. Wicks, William G. Dunford, L. R. Linares. A Dynamic Circuit-Based Ferromagnetic Model
2301 -- 2314Chia-Hsiang Yang, Dejan Markovic. A Flexible DSP Architecture for MIMO Sphere Decoding
2315 -- 2324Renfei Liu, Keshab K. Parhi. Low-Latency Low-Complexity Architectures for Viterbi Decoders
2325 -- 2331Wei-Zen Chen, Ruei-Ming Gan, Shih Hao Huang. A Single-Chip 2.5-Gb/s CMOS Burst-Mode Optical Receiver
2332 -- 2340Dongwon Seo, Manu Mishra, Bo Sun, Gene H. McAllister. A Pseudodifferential Class AB DAC for Low-Power Wireless Transmitter
2341 -- 2352Chao-Shiun Wang, Juin-Wei Huang, Kun-Da Chu, Chorng-Kuang Wang. A 60-GHz Phased Array Receiver Front-End in 0.13-mu hboxm CMOS Technology
2353 -- 2361Tong Ge, Joseph S. Chang. Bang-Bang Control Class D Amplifiers: Total Harmonic Distortion and Supply Noise
2362 -- 2371Hiroo Sekiya, Takayuki Watanabe, Tadashi Suetsugu, Marian K. Kazimierczuk. Analysis and Design of Class DE Amplifier With Nonlinear Shunt Capacitances

Volume 56-I, Issue 1

1 -- 3Gianluca Setti. Editorial TCAS-I State and Plans for the Future
4 -- 16Behzad Razavi. Design of Millimeter-Wave CMOS Radios: A Tutorial
17 -- 39Bryan Casper, Frank O'Mahony. Clocking Analysis, Implementation and Measurement Techniques for High-Speed Data Links - A Tutorial
40 -- 50Kofi M. Odame, Paul E. Hasler. Theory and Design of OTA-C Oscillators with Native Amplitude Limiting
51 -- 59Ching-Yuan Yang, Chih-Hsiang Chang, Wen-Ger Wong. A Delta-Sigma PLL-Based Spread-Spectrum Clock Generator With a Ditherless Fractional Topology
60 -- 73Hao-Chiao Hong, Sheng-Chuan Liang. A Decorrelating Design-for-Digital-Testability Scheme for Sigma-Delta Modulators
74 -- 83Francisco Colodro Ruiz, Antonio Jesús Torralba Silgado. New Continuous-Time Multibit Sigma-Delta Modulators With Low Sensitivity to Clock Jitter
84 -- 96Wei Shu, Joseph Sylvester Chang. Power Supply Noise in Analog Audio Class D Amplifiers
97 -- 102Gino Giusi, Felice Crupi, Calogero Pace, Paolo Magnone. Full Model and Characterization of Noise in Operational Amplifier
103 -- 113Yuanjin Zheng, Jiangnan Yan, Yong Ping Xu. A CMOS VGA With DC Offset Cancellation for Direct-Conversion Receivers
114 -- 123Kiyoto Ito, Benjamas Tongprasit, Tadashi Shibata. A Computational Digital Pixel Sensor Featuring Block-Readout Architecture for On-Chip Image Processing
124 -- 131Hungwen Lu, Chauchin Su, Chien-Nan Jimmy Liu. A Tree-Topology Multiplexer for Multiphase Clock System
132 -- 143Kuan-Hung Chen, Yuan-Sun Chu. A Spurious-Power Suppression Technique for Multimedia/DSP Applications
144 -- 155Tsung-Han Tsai, Chun-Nan Liu. Low-Power System Design for MPEG-2/4 AAC Audio Decoder Using Pure ASIC Approach
156 -- 167Riccardo Rovatti, Gianluca Mazzini, Gianluca Setti. Memory-m Antipodal Processes: Spectral Analysis and Synthesis
168 -- 178Fernando Cruz-Roldán, Pilar Martín-Martín, José Sáez Landete, Manuel Blanco-Velasco, Tapio Saramäki. A Fast Windowing-Based Technique Exploiting Spline Functions for Designing Modulated Filter Banks
179 -- 189Jacek Piskorowski, Miguel Ángel Gutiérrez de Anda. A New Class of Continuous-Time Delay-Compensated Parameter-Varying Low-Pass Elliptic Filters With Improved Dynamic Behavior
190 -- 199Andreas Amann, Michael P. Mortell, Eoin P. O'Reilly, Michael Quinlan, Dimitri Rachinskii. Mechanism of Synchronization in Frequency Dividers
200 -- 209Jun Zhou, Yasuharu Ohsawa. Improved Swing Equation and Its Properties in Synchronous Generators
210 -- 223Rafael J. Avalos, Claudio A. Cañizares, Federico Milano, Antonio J. Conejo. Equivalency of Continuation and Optimization Methods to Determine Saddle-Node and Limit-Induced Bifurcations in Power Systems
224 -- 232Bin Zhang, Stephen A. Billings, Zi Qiang Lang, Geoffrey R. Tomlinson. Analytical Description of the Frequency Response Function of the Generalized Higher Order Duffing Oscillator Model
233 -- 245Bin Liu 0003, David J. Hill. Comparison Principle and Stability of Discrete-Time Impulsive Hybrid Systems
246 -- 255Stephen Andrew Laraway, Behrouz Farhang-Boroujeny. Implementation of a Markov Chain Monte Carlo Based Multiuser/MIMO Detector
256 -- 267Emanuele Lopelli, Johan van der Tang, Arthur H. M. van Roermund. Minimum Power-Consumption Estimation in ROM-Based DDFS for Frequency-Hopping Ultralow-Power Transmitters
268 -- 279Brian J. Minnis, Paul A. Moore, Paul N. Whatmough, Peter G. Blanken, Mark P. van der Heijden. System-Efficiency Analysis of Power Amplifier Supply-Tracking Regimes in Mobile Transmitters
280 -- 0Sunwoo Kwon, Franco Maloberti. Comments on "Efficient Multibit Quantization in Continuous-Time Sigma Delta Modulators"