| 721 | -- | 725 | Malihe Zarre Dooghabadi, Håkon A. Hjortland, Øivind Næss, Kin Keung Lee, Tor Sverre Lande. An IR-UWB Transmitter for Ranging Systems |
| 726 | -- | 730 | ZiJie Hu, Koen Mouthaan. A 1- to 10-GHz RF and Wideband IF Cross-Coupled Gilbert Mixer in 0.13- $\mu\hbox{m}$ CMOS |
| 731 | -- | 735 | Chun-hsiang Chang, Marvin Onabajo. IIP3 Enhancement of Subthreshold Active Mixers |
| 736 | -- | 740 | Nagarajan Mahalingam, Kaixue Ma, Kiat Seng Yeo, Wei Meng Lim. $K$-band High-PAE Wide-Tuning-Range VCO Using Triple-Coupled $LC$ Tanks |
| 741 | -- | 745 | Sebastian Höppner, Stefan Hänzsche, Georg Ellguth, Dennis Walter, Holger Eisenreich, René Schüffny. A Fast-Locking ADPLL With Instantaneous Restart Capability in 28-nm CMOS Technology |
| 746 | -- | 750 | Mohsen Hassanpourghadi, Mohammad Sharifkhani. Fast Static Characterization of Residual-Based ADCs |
| 751 | -- | 755 | Tom Redant, Pieter A. J. Nuyts, Patrick Reynaert, Wim Dehaene. Presilicon Circuit-Aware Linear Least Squares Spectral Analysis for Time-Based Data Converters |
| 756 | -- | 760 | Sergio Callegari, Federico Bizzarri. Noise Weighting in the Design of $\Delta\Sigma$ Modulators (With a Psychoacoustic Coder as an Example) |
| 761 | -- | 765 | Yong Chen, Pui-In Mak, Stefano D'Amico, Li Zhang, He Qian, Yan Wang. A Single-Branch Third-Order Pole-Zero Low-Pass Filter With 0.014- $\hbox{mm}^{2}$ Die Size and 0.8-kHz (1.25-nW) to 0.94-GHz (3.99-mW) Bandwidth-Power Scalability |
| 766 | -- | 770 | Fatemeh Aezinia, Behraad Bahreyni. An Interface Circuit With Wide Dynamic Range for Differential Capacitive Sensing Applications |
| 771 | -- | 775 | Li Lu, Scott T. Block, David E. Duarte, Changzhi Li. A 0.45-V MOSFETs-Based Temperature Sensor Front-End in 90 nm CMOS With a Noncalibrated $\pm \hbox{3.5} \ ^{\circ}\hbox{C} \ \hbox{3}\sigma$ Relative Inaccuracy From $-\hbox{55} \ ^{\circ}\hbox{C}$ to 105 $^{\circ}\hbox{C}$ |
| 776 | -- | 780 | Sang Yun Kim, Jong-Min Baek, Dong Jin Seo, Jae-Koo Park, Jung-Hoon Chun, Kee-Won Kwon. Power-Efficient Fast Write and Hidden Refresh of ReRAM Using an ADC-Based Sense Amplifier |
| 781 | -- | 785 | M. Surya Prakash, Rafi Ahamed Shaik. Low-Area and High-Throughput Architecture for an Adaptive Filter Using Distributed Arithmetic |
| 786 | -- | 790 | Salvador Manich, Martin Strasser. A Highly Time Sensitive XOR Gate for Probe Attempt Detectors |
| 791 | -- | 795 | Guiming Wu, Xianghui Xie, Yong Dou, Miao Wang. High-Performance Architecture for the Conjugate Gradient Solver on FPGAs |
| 796 | -- | 800 | Amirhossein Alimohammad, Saeed Fouladi Fard. FPGA Implementation of Isotropic and Nonisotropic Fading Channels |
| 801 | -- | 805 | A. Ruan, J. Yang, L. Wan, B. Jie, Z. Tian. Insight Into a Generic Interconnect Resource Model for Xilinx Virtex and Spartan Series FPGAs |
| 806 | -- | 810 | Shin-Chi Lai, Meng-Kun Lee, An-Kai Li, Ching-Hsing Luo, Sheau-Fang Lei. An Innovative Fast Algorithm and Structure Design for Analysis and Synthesis Quadrature Mirror Filterbanks on the SBR in DRM |
| 811 | -- | 815 | Shiyuan Wang, Jiuchao Feng, Chi Kong Tse. Kernel Affine Projection Sign Algorithms for Combating Impulse Interference |
| 816 | -- | 820 | Yang Yi, Wei Xing Zheng, Lei Guo. Improved Results on Statistic Information Control With a Dynamic Neural Network Identifier |