David E. Duarte - researchr alias

researchr

You are not signed in
Sign in
Sign up

Viewing Publication 1 - 8 from 8

2022

A 90.9kS/s, 0.7nJ/conversion Hybrid Temperature Sensor in 4nm-class CMOSYou Li, David E. Duarte, Yongping Fan. vlsit 2022: 118-119 [doi]

2016

A Compact First-Order $\Sigma\Delta $ Modulator for Analog High-Volume Testing of Complex System-on-Chips in a 14 nm Tri-Gate Digital CMOS ProcessTakao Oshita, Joseph Shor, David E. Duarte, Avner Kornfeld, George L. Geannopoulos, Jonathan Douglas, Nasser A. Kurd. jssc, 51(2):378-390, 2016. [doi]

2015

Compact BJT-Based Thermal Sensor for Processor Applications in a 14 nm tri-Gate CMOS ProcessTakao Oshita, Joseph Shor, David E. Duarte, Avner Kornfeld, Dror Zilberman. jssc, 50(3):799-807, 2015. [doi]

2013

A 0.45-V MOSFETs-Based Temperature Sensor Front-End in 90 nm CMOS With a Noncalibrated $\pm \hbox{3.5} \ ^{\circ}\hbox{C} \ \hbox{3}\sigma$ Relative Inaccuracy From $-\hbox{55} \ ^{\circ}\hbox{C}$ to 105 $^{\circ}\hbox{C}$Li Lu, Scott T. Block, David E. Duarte, Changzhi Li. tcas, 60-II(11):771-775, 2013. [doi]

2010

HVM performance validation and DFM techniques used in a 32nm CMOS thermal sensor systemDavid E. Duarte, Paola Zepeda, Suching Hsu, Atul Maheshwari, Greg Taylor. cicc 2010: 1-4 [doi]

Interpolated VCO design for a low bandwidth, low-jitter, self-biased PLL in 45 nm CMOSDavid E. Duarte, Suching Hsu, Keng L. Wong, Mingwei Huang, Greg Taylor. cicc 2010: 1-4 [doi]

2007

Temperature Sensor Design in a High Volume Manufacturing 65nm CMOS Digital ProcessDavid E. Duarte, George Geannopoulos, Usman Mughal, Keng L. Wong, Greg Taylor. cicc 2007: 221-224 [doi]

Advanced thermal sensing circuit and test techniques used in a high performance 65nm processorDavid E. Duarte, Greg Taylor, Keng L. Wong, Usman Mughal, George Geannopoulos. islped 2007: 304-309 [doi]

Sign in or sign up to see more results.

runs on WebDSL