Nasser A. Kurd - researchr alias

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Viewing Publication 1 - 22 from 22

2022

Improving SIMO-Regulated Digital SoC Energy Efficiencies Through Adaptive Clocking and Concurrent Domain ControlChi-Hsiang Huang 0001, Yidong Chen, Xun Sun, Arindam Mandal, Venkata Rajesh Pamula 0001, Nasser A. Kurd, Visvesh S. Sathe 0001. jssc, 57(1):90-102, 2022. [doi]

A 2-to-2.48GHz Voltage-Interpolator-Based Fractional-N Type-I Sampling PLL in 22nm FinFET Assisting Fast Crystal StartupSomnath Kundu, Timo Huusari, Hao Luo, Abhishek Agrawal, Eduardo Alban, Sarah Shahraini, Thao Xiong, Dan Lake, Stefano Pellerano, Jason Mix, Nasser A. Kurd, Mohamed Abdel-moneum, Brent R. Carlton. isscc 2022: 144-146 [doi]

A Fast Startup Crystal Oscillator Using Impedance Guided Chirp Injection in 22 nm FinFET CMOSHao Luo, Somnath Kundu, Timo Huusari, Sarah Shahraini, Eduardo Alban, Jason Mix, Nasser A. Kurd, Mohamed Abdel-moneum, Brent R. Carlton. jssc, 57(3):688-697, 2022. [doi]

2021

2018

A Flexible, Low-Power Analog PLL for SoC and Processors in 14nm CMOSKuan-Yueh James Shen, Syed Feruz Syed Farooq, Yongping Fan, Khoa Minh Nguyen, Qi Wang, Mark Neidengard, Nasser A. Kurd, Amr Elshazly. tcas, 65-I(7):2109-2117, 2018. [doi]

2016

2015

Haswell: A Family of IA 22 nm ProcessorsNasser A. Kurd, Muntaquim Chowdhury, Edward Burton, Thomas P. Thomas, Christopher Mozak, Brent Boswell, Praveen Mosalikanti, Mark Neidengard, Anant Deval, Ashish Khanna, Nasirul Chowdhury, Ravi Rajwar, Timothy M. Wilson, Rajesh Kumar. jssc, 50(1):49-58, 2015. [doi]

A system-verilog behavioral model for PLLs for pre-silicon validation and top-down design methodologyAmr Lotfy, Syed Feruz Syed Farooq, Qi S. Wang, Soner Yaldiz, Praveen Mosalikanti, Nasser A. Kurd. cicc 2015: 1-4 [doi]

TM microprocessor (broadwell)Praveen Mosalikanti, Nasser A. Kurd, Christopher Mozak, Takao Oshita. cicc 2015: 1-4 [doi]

Broadwell: A family of IA 14nm processorsAnkireddy Nalamalpu, Nasser A. Kurd, Anant Deval, Christopher Mozak, Jonathan Douglas, Ashish Khanna, Fabrice Paillet, Gerhard Schrom, Boyd Phelps. vlsic 2015: 314 [doi]

2014

5.9 Haswell: A family of IA 22nm processorsNasser A. Kurd, Muntaquim Chowdhury, Edward Burton, Thomas P. Thomas, Christopher Mozak, Brent Boswell, Manoj Lal, Anant Deval, Jonathan Douglas, Ali M. El-Husseini, Ankireddy Nalamalpu, Timothy M. Wilson, Matthew Merten, Srinivas Chennupaty, Wilfred Gomes, Rajesh Kumar. isscc 2014: 112-113 [doi]

2012

2011

A Family of 32 nm IA ProcessorsNasser A. Kurd, Subramani Bhamidipati, Christopher Mozak, Jeffrey L. Miller, Praveen Mosalikanti, Timothy M. Wilson, Ali M. El-Husseini, Mark Neidengard, Ramy E. Aly, Mahadev Nemani, Muntaquim Chowdhury, Rajesh Kumar. jssc, 46(1):119-130, 2011. [doi]

2010

Westmere: A family of 32nm IA processorsNasser A. Kurd, Subramani Bhamidipati, Christopher Mozak, Jeffrey L. Miller, Timothy M. Wilson, Mahadev Nemani, Muntaquim Chowdhury. isscc 2010: 96-97 [doi]

2009

Next Generation Intel¯ Core™ Micro-Architecture (Nehalem) ClockingNasser A. Kurd, Praveen Mosalikanti, Mark Neidengard, Jonathan Douglas, Rajesh Kumar. jssc, 44(4):1121-1129, 2009. [doi]

2008

Skewed Repeater Bus: A Low-Power Scheme for On-Chip BusesMaged Ghoneima, Muhammad M. Khellah, James Tschanz, Yibin Ye, Nasser A. Kurd, Javed Barkatullah, Srikanth Nimmagadda, Yehea I. Ismail, Vivek K. De. tcas, 55-I(7):1904-1910, 2008. [doi]

2007

2001

A multigigahertz clocking scheme for the Pentium(R) 4 microprocessorNasser A. Kurd, Javed S. Barkatullah, Rommel O. Dizon, Thomas D. Fletcher, Paul D. Madland. jssc, 36(11):1647-1653, 2001. [doi]

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