| 617 | -- | 624 | Xing Li, Chi-Ying Tsui, Wing-Hung Ki. Power Management Analysis of Inductively-Powered Implants with 1X/2X Reconfigurable Rectifier |
| 625 | -- | 634 | Marius Neag, Raul Onet, Istvan Kovacs, Paul Martari. Comparative Analysis of Simulation-Based Methods for Deriving the Phase- and Gain-Margins of Feedback Circuits With Op-Amps |
| 635 | -- | 644 | Yongsun Lee, Mina Kim, Taeho Seong, Jaehyouk Choi. A Low Phase Noise Injection-Locked Programmable Reference Clock Multiplier With a Two-Phase PVT-Calibrator for ΔΣ PLLs |
| 645 | -- | 653 | Achille Donida, Remy Cellier, Angelo Nagari, Piero Malcovati, Andrea Baschirotto. A 40-nm CMOS, 1.1-V, 101-dB Dynamic-Range, 1.7-mW Continuous-Time ΣΔ ADC for a Digital Closed-Loop Class-D Amplifier |
| 654 | -- | 661 | Sudipta Sarkar, Yuan Zhou, Brian Elies, Yun Chiu. PN-Assisted Deterministic Digital Background Calibration of Multistage Split-Pipelined ADC |
| 662 | -- | 670 | Quanzhen Duan, Jeongjin Roh. A 1.2-V 4.2- ppm°C High-Order Curvature-Compensated CMOS Bandgap Reference |
| 671 | -- | 679 | Yao Liu, Reza Lotfi, Yongchang Hu, Wouter A. Serdijn. A Comparative Analysis of Phase-Domain ADC and Amplitude-Domain IQ ADC |
| 680 | -- | 688 | Anders Jakobsson, Adriana Serban, Shaofang Gong. Implementation of Quantized-State System Models for a PLL Loop Filter Using Verilog-AMS |
| 689 | -- | 696 | Zhangming Zhu, Zheng Qiu, Maliang Liu, Ruixue Ding. A 6-to-10-Bit 0.5 V-to-0.9 V Reconfigurable 2 MS/s Power Scalable SAR ADC in 0.18 µm CMOS |
| 697 | -- | 706 | Jun Zhou, Chao Wang, Xin Liu, Xin Zhang, Minkyu Je. An Ultra-Low Voltage Level Shifter Using Revised Wilson Current Mirror for Fast and Energy-Efficient Wide-Range Voltage Conversion from Sub-Threshold to I/O Voltage |
| 707 | -- | 716 | Yan Lu, Yipeng Wang, Quan Pan, Wing-Hung Ki, C. Patrick Yue. A Fully-Integrated Low-Dropout Regulator With Full-Spectrum Power Supply Rejection |
| 717 | -- | 724 | Ahmed Ashry, Diomadson Belfort, Hassan Aboushady. Phase Noise Effect on Sine-Shaped Feedback DACs Used in Continuous-Time ΣΔ ADCs |
| 725 | -- | 732 | Mark E. Halpern, David C. Ng. Optimal Tuning of Inductive Wireless Power Links: Limits of Performance |
| 733 | -- | 742 | Chenxin Zhang, Liang Liu, Dejan Markovic, Viktor Öwall. A Heterogeneous Reconfigurable Cell Array for MIMO Signal Processing |
| 743 | -- | 751 | Ming-Chiuan Su, Wei-Zen Chen, Pei-Si Wu, Yu-Hsian Chen, Chao-Cheng Lee, Shyh-Jye Jou. A 10-Gb/s, 1.24 pJ/bit, Burst-Mode Clock and Data Recovery With Jitter Suppression |
| 752 | -- | 760 | Chua-Chin Wang, Chih-Lin Chen, Zong-You Hou, Yi Hu, Jam Wem Lee, Wan-Yen Lin, Yi-Feng Chang, Chia-Wei Hsu, Ming-Hsiang Song. A 60 V Tolerance Transceiver With ESD Protection for FlexRay-Based Communication Systems |
| 761 | -- | 770 | Katayoun Neshatpour, Mahdi Shabany, P. Glenn Gulak. A High-Throughput VLSI Architecture for Hard and Soft SC-FDMA MIMO Detectors |
| 771 | -- | 780 | Shuhei Tanakamaru, Yuta Kitamura, Senju Yamazaki, Tsukasa Tokutomi, Ken Takeuchi. Highly Reliable Coding Methods for Emerging Applications: Archive and Enterprise Solid-State Drives (SSDs) |
| 781 | -- | 790 | Taeho Seong, Jae-Joon Kim, Jaehyouk Choi. Analysis and Design of a Core-Size-Scalable Low Phase Noise LC-VCO for Multi-Standard Cellular Transceivers |
| 791 | -- | 798 | Pere Palà-Schönwälder, Jordi Bonet-Dalmau, Alexis Lopez-Riera, F. Xavier Moncunill-Geniz, Francisco del Águìla López, M. Rosa Giralt-Mas. Superregenerative Reception of Narrowband FSK Modulations |
| 799 | -- | 806 | Xinmin Yu, Hooman Rashtian, Shahriar Mirabbasi, Partha Pratim Pande, Deuk Hyoun Heo. An 18.7-Gb/s 60-GHz OOK Demodulator in 65-nm CMOS for Wireless Network-on-Chip |
| 807 | -- | 815 | Shlomo Greenberg, Joseph Rabinowicz, Erez Manor. Selective State Retention Power Gating Based on Formal Verification |
| 816 | -- | 824 | Seongbo Shim, Jae-Wook Lee, Youngsoo Shin. An Analytical Approach to Thermal Design and Optimization With a Temperature-Dependent Power Model |
| 825 | -- | 834 | Zhaomeng Cheng, Hai-Tao Zhang, Ming-Can Fan, Guanrong Chen. Distributed Consensus of Multi-Agent Systems With Input Constraints: A Model Predictive Control Approach |
| 835 | -- | 843 | Massimo Alioto, Elio Consoli, Gaetano Palumbo. Variations in Nanometer CMOS Flip-Flops: Part II - Energy Variability and Impact of Other Sources of Variations |
| 844 | -- | 853 | Shuhei Tanakamaru, Hiroki Yamazawa, Tsukasa Tokutomi, Sheyang Ning, Ken Takeuchi. Design Methodology for Highly Reliable, High Performance ReRAM and 3-Bit/Cell MLC NAND Flash Solid-State Storage |
| 854 | -- | 862 | Chiou-Yng Lee, Pramod Kumar Meher. Efficient Subquadratic Space Complexity Architectures for Parallel MPB Single- and Double-Multiplications for All Trinomials Using Toeplitz Matrix-Vector Product Decomposition |
| 863 | -- | 872 | Xin Lou, Ya Jun Yu, Pramod Kumar Meher. Fine-Grained Critical Path Analysis and Optimization for Area-Time Efficient Realization of Multiple Constant Multiplications |
| 873 | -- | 880 | María del Carmen Pérez, Rodrigo Garcia, Álvaro Hernández, Ana Jiménez, Cristina Diego, Jesús Ureña. SoC-Based Architecture for an Ultrasonic Phased Array With Encoded Transmissions |
| 881 | -- | 890 | Jiafeng Xie, Pramod Kumar Meher, Zhi-Hong Mao. m) for NIST Recommended Pentanomials |
| 891 | -- | 898 | Maheshwar Pd. Sah, Changju Yang, Hyongsuk Kim, Bharathwaj Muthuswamy, Jovan Jevtic, Leon O. Chua. A Generic Model of Memristors With Parasitic Components |
| 899 | -- | 905 | Xiang Li, Pengchun Rao. Synchronizing a Weighted and Weakly-Connected Kuramoto-Oscillator Digraph With a Pacemaker |
| 906 | -- | 915 | Mika Laiho, Jennifer O. Hasler, Jiantao Zhou, Chao Du, Wei Lu, Eero Lehtonen, Jussi H. Poikonen. FPAA/Memristor Hybrid Computing Infrastructure |
| 916 | -- | 925 | Xin Zhang, Xinbo Ruan, Chi K. Tse. Impedance-Based Local Stability Criterion for DC Distributed Power Systems |