Journal: IEEE Trans. on Circuits and Systems

Volume 65-I, Issue 1

1 -- 2Andreas Demosthenous. New Year Editorial
3 -- 13Jeff T. Sloan, Mohamed A. K. Othman, Filippo Capolino. Theory of Double Ladder Lumped Circuits With Degenerate Band Edge
14 -- 25Wei-Han Yu, Ka-Fai Un, Pui-In Mak, Rui Paulo Martins. A 0.7-2.5 GHz, 61% EIRP System Efficiency, Four-Element MIMO TX System Exploiting Integrated Power-Relaxed Power Amplifiers and an Analog Spatial De-Interleaver
26 -- 38Zhijian Pan, Chuan Qin, Zuochang Ye, Yan Wang, Zhiping Yu. m Enhancement and Noise-Cancellation
39 -- 50Erkan Bayram, Ahmed Farouk Aref, Mohamed Saeed, Renato Negra. 1.5-3.3 GHz, 0.0077 mm2, 7 mW All-Digital Delay-Locked Loop With Dead-Zone Free Phase Detector in 0.13~µm CMOS
51 -- 60Yi Shen, Zhangming Zhu, Shubin Liu, Yintang Yang. A Reconfigurable 10-to-12-b 80-to-20-MS/s Bandwidth Scalable SAR ADC
61 -- 73Mahmoud Sadollahi, Koichi Hamashita, Kazuki Sobue, Gabor C. Temes. An 11-Bit 250-nW 10-kS/s SAR ADC With Doubled Input Range for Biomedical Applications
74 -- 83Juan Pablo Caram, Jeff Galloway, J. Stevenson Kenney. Time-to-Digital Converter With Sample-and-Hold and Quantization Noise Scrambling Using Harmonics in Ring Oscillators
84 -- 94Nan Chen, Shengyou Zhong, Mei Zou, Jiqing Zhang, Zhongshun Ji, Libin Yao. A Low-Noise CMOS Image Sensor With Digital Correlated Multiple Sampling
95 -- 106Lianxi Liu, Junchao Mu, Zhangming Zhu. A 0.55-V, 28-ppm/°C, 83-nW CMOS Sub-BGR With UltraLow Power Curvature Compensation
107 -- 117Ming-Ke Tsai, Tse-An Chen, Heng-Yu Chiu, Tse-Wei Wu, Chia-Ling Wei. Monolithic Airflow Detection Chip With Automatic DC Offset Calibration
118 -- 129Xin-Yu Shih, Hong-Ru Chou, Yue-Qu Liu. VLSI Design and Implementation of Reconfigurable 46-Mode Combined-Radix-Based FFT Hardware Architecture for 3GPP-LTE Applications
130 -- 140Indranil Hatai, Indrajit Chakrabarti, Swapna Banerjee. A Computationally Efficient Reconfigurable Constant Multiplication Architecture Based on CSD Decoded Vertical-Horizontal Common Sub-Expression Elimination Algorithm
141 -- 153Bing-Chen Wu, I-Chyn Wey. Parallel Balanced-Bit-Serial Design Technique for Ultra-Low-Voltage Circuits With Energy Saving and Area Efficiency Enhancement
154 -- 162Lijuan Li, Shuguo Li. Improved Algorithms and Implementations for Integer to τ NAF Conversion for Koblitz Curves
163 -- 174Taehui Na, Byungkyu Song, Jung Pill Kim, Seung-Hyuk Kang, Seong-Ook Jung. Data-Cell-Variation-Tolerant Dual-Mode Sensing Scheme for Deep Submicrometer STT-RAM
175 -- 184Joshua Yung Lih Low, Ching-Chuen Jong. Range Mapping - A Fresh Approach to High Accuracy Mitchell-Based Logarithmic Conversion Circuit Design
185 -- 197Grzegorz Deptuch, Farah Fahim, Pawel Grybos, Jim Hoff, Scott Holm, Piotr Maj, David Peter Siddons, Piotr Kmon, Marcel Trimpl, Tom Zimmerman. An Algorithm of an X-ray Hit Allocation to a Single Pixel in a Cluster and Its Test-Circuit Implementation
198 -- 208Li Du, Yuan Du, Yilei Li, Junjie Su, Yen-Cheng Kuan, Chun-Chen Liu, Mau-Chung Frank Chang. A Reconfigurable Streaming Deep Convolutional Neural Network Accelerator for Internet of Things
209 -- 222Sebastian Buschjäger, Katharina Morik. Decision Tree and Random Forest Implementations for Fast Filtering of Sensor Data
223 -- 234Ali Reza Hazeri, Hossein Miar Naimi. Generalized Analytical Equations for Injected Ring Oscillator With RC-Load
235 -- 246Zhongyun Hua, Yicong Zhou. One-Dimensional Nonlinear Model for Producing Chaos
247 -- 256Honorio Martín, Giorgio Di Natale, Luis Entrena. Towards a Dependable True Random Number Generator With Self-Repair Capabilities
257 -- 269ChandraKanth R. Chappidi, Kaushik Sengupta. Globally Optimal Matching Networks With Lossy Passives and Efficiency Bounds
270 -- 282Mohammed E. Fouda, Ahmed M. Eltawil, Fadi J. Kurdahi. Modeling and Analysis of Passive Switching Crossbar Arrays
283 -- 292Andreas Pedross-Engel, Hermann Schumacher, Klaus Witrisal. Modeling and Identification of Ultra-Wideband Analog Multipliers
293 -- 306Victor M. van Santen, Javier Martín-Martínez, Hussam Amrouch, Montserrat Nafría, Jörg Henkel. Reliability in Super- and Near-Threshold Computing: A Unified Model of RTN, BTI, and PV
307 -- 318Yan Wang, Kenli Li, Jun Zhang, Keqin Li 0001. Energy Optimization for Data Allocation With Hybrid SRAM+NVM SPM
319 -- 330Marko Mailand. System Analysis of Six-Port-Based RF-Receivers
331 -- 342Junyoung Song, Sewook Hwang, Hyun-Woo Lee, Chulwoo Kim. A 1-V 10-Gb/s/pin Single-Ended Transceiver With Controllable Active-Inductor-Based Driver and Adaptively Calibrated Cascaded-Equalizer for Post-LPDDR4 Interfaces
343 -- 352Razvan-Cristian Marin, Antoine Frappe, Andreas Kaiser. Digital Complex Delta-Sigma Modulators With Highly Configurable Notches for Multi-Standard Coexistence in Wireless Transmitters
353 -- 365Chaudhry Adnan Aslam, Yong Liang Guan, Kui Cai. Decision-Directed Retention-Failure Recovery With Channel Update for MLC NAND Flash Memory
366 -- 379Minbok Lee, Joonseok Yang, Myeong-Jae Park, Sung-Youb Jung, Jaeha Kim. Design and Analysis of Energy-Efficient Single-Pulse Piezoelectric Energy Harvester and Power Management IC for Battery-Free Wireless Remote Switch Applications
380 -- 393Sergio Saponara, Gabriele Ciarpi. IC Design and Measurement of an Inductorless 48 V DC/DC Converter in Low-Cost CMOS Technology Facing Harsh Environments
394 -- 405Cui Keer, Victor Adrian, Bah-Hwee Gwee, Joseph S. Chang. A Noise-Shaped Randomized Modulation for Switched-Mode DC-DC Converters
406 -- 418Wenxu Zhao, Peter Gadfort, Kirti Bhanushali, Paul D. Franzon. RF-Only Logic: an Area Efficient Logic Family for RF-Power Harvesting Applications