Journal: IEEE Trans. on Circuits and Systems

Volume 64-I, Issue 9

2221 -- 2225Massimo Alioto, Edgar Sánchez-Sinencio, Alberto L. Sangiovanni-Vincentelli. Guest Editorial Special Issue on Circuits and Systems for the Internet of Things - From Sensing to Sensemaking
2226 -- 2236Giovanni De Micheli. Cyber-Medical Systems: Requirements, Components and Design Examples
2237 -- 2249Taek-Kang Jang, Gyouho Kim, Benjamin P. Kempke, Michael B. Henry, Nikolaos Chiotellis, Carl Pfeiffer, Dongkwun Kim, Yejoong Kim, Zhiyoong Foo, Hyeongseok Kim, Anthony Grbic, Dennis Sylvester, Hun-Seok Kim, David D. Wentzloff, David Blaauw. Circuit and System Designs of Ultra-Low Power Sensor Nodes With Illustration in a Miniaturized GNSS Logger for Position Tracking: Part I - Analog Circuit Techniques
2250 -- 2262Tae-Kwang Jang, Gyouho Kim, Benjamin P. Kempke, Michael B. Henry, Nikolaos Chiotellis, Carl Pfeiffer, Dongkwun Kim, Yejoong Kim, Zhiyoong Foo, Hyeongseok Kim, Anthony Grbic, Dennis Sylvester, Hun-Seok Kim, David D. Wentzloff, David Blaauw. Circuit and System Designs of Ultra-Low Power Sensor Nodes With Illustration in a Miniaturized GNSS Logger for Position Tracking: Part II - Data Communication, Energy Harvesting, Power Management, and Digital Circuits
2263 -- 2273Haitong Li, Tony F. Wu, Subhasish Mitra, H.-S. Philip Wong. Resistive RAM-Centric Computing: Design and Modeling Methodology
2274 -- 2283Xiaoyang Wang, Po-Han Peter Wang, Yuan Cao, Patrick P. Mercier. A 0.6V 75nW All-CMOS Temperature Sensor With 1.67m°C/mV Supply Sensitivity
2284 -- 2294Aili Wang, Chixiao Chen, Chuanjin Richard Shi. Design and Analysis of an Always-ON Input-Biased pA-Current Sub-nW mV-Threshold Hysteretic Comparator for Near-Zero Energy Sensing
2295 -- 2307Jong Hwan Ko, Mohammad Faisal Amir, Khondker Zakir Ahmed, Taesik Na, Saibal Mukhopadhyay. A Single-Chip Image Sensor Node With Energy Harvesting From a CMOS Pixel Array
2308 -- 2321Fernanda D. V. R. Oliveira, José Gabriel Rodríguez Carneiro Gomes, Jorge Fernandez-Berni, Ricardo Carmona-Galán, Rocio del Río, Ángel Rodríguez-Vázquez. Gaussian Pyramid: Comparative Analysis of Hardware Architectures
2322 -- 2333David E. Bellasi, Luca Benini. Smart Energy-Efficient Clock Synthesizer for Duty-Cycled Sensor SoCs in 65 nm/28nm CMOS
2334 -- 2345Karim Rawy, Felix Kalathiparambil, Dominic Maurath, Tony Tae-Hyoung Kim. A Self-Adaptive Time-Based MPPT With 96.2% Tracking Efficiency and a Wide Tracking Range of 10 µA to 1 mA for IoT Applications
2346 -- 2358Qiping Wan, Ying Khai Teh, Yuan Gao 0002, Philip K. T. Mok. Analysis and Design of a Thermoelectric Energy Harvesting System With Reconfigurable Array of Thermoelectric Generators for IoT Applications
2359 -- 2369Saroj Mondal, Roy Paily. Efficient Solar Power Management System for Self-Powered IoT Node
2370 -- 2379Anand Savanth, Alex S. Weddell, James Myers, David Flynn, Bashir M. Al-Hashimi. Integrated Reciprocal Conversion With Selective Direct Operation for Energy Harvesting Systems
2380 -- 2387Kaveh Gharehbaghi, Fatih Kocer, Haluk Kulah. Optimization of Power Conversion Efficiency in Threshold Self-Compensated UHF Rectifiers With Charge Conservation Principle
2388 -- 2400Andrea Bonetti, Adam Teman, Philippe Flatresse, Andreas Burg. Multipliers-Driven Perturbation of Coefficients for Low-Power Operation in Reconfigurable FIR Filters
2401 -- 2413Taesik Na, Jong Hwan Ko, Saibal Mukhopadhyay. Clock Data Compensation Aware Digital Circuits Design for Voltage Margin Reduction
2414 -- 2426Long N. Le, Douglas L. Jones. Guided-Processing Outperforms Duty-Cycling for Energy-Efficient Systems
2427 -- 2437Muath Abu Lebdeh, Heba Abunahla, Baker Mohammad, Mahmoud Al-Qutayri. An Efficient Heterogeneous Memristive xnor for In-Memory Computing
2438 -- 2447Anuj Grover, G. S. Visweswaran, Chittoor R. Parthasarathy, Mohammad Daud, David Turgis, Bastien Giraud, Jean-Philippe Noel, Ivan Miro Panades, Guillaume Moritz, Edith Beigné, Philippe Flatresse, Promod Kumar, Shamsi Azmi. A 32 kb 0.35-1.2 V, 50 MHz-2.5 GHz Bit-Interleaved SRAM With 8 T SRAM Cell and Data Dependent Write Assist in 28-nm UTBB-FDSOI CMOS
2448 -- 2461Loris Duch, Soumya Basu, Rubén Braojos, Giovanni Ansaloni, Laura Pozzi, David Atienza. HEAL-WEAR: An Ultra-Low Power Heterogeneous System for Bio-Signal Analysis
2462 -- 2469Tobias Strauch. Connecting Things to the IoT by Using Virtual Peripherals on a Dynamically Multithreaded Cortex M3
2470 -- 2480Ningyuan Cao, Saad Bin Nasir, Shreyas Sen, Arijit Raychowdhury. Self-Optimizing IoT Wireless Video Sensor Node With In-Situ Data Analytics and Context-Driven Energy-Aware Real-Time Adaptation
2481 -- 2494Francesco Conti 0001, Robert Schilling, Pasquale Davide Schiavone, Antonio Pullini, Davide Rossi, Frank Kagan Gürkaynak, Michael Muehlberghuber, Michael Gautschi, Igor Loi, Germain Haugou, Stefan Mangard, Luca Benini. An IoT Endpoint System-on-Chip for Secure and Energy-Efficient Near-Sensor Analytics
2495 -- 2507Jun Zhou, Amir Tofighi Zavareh, Robin Gupta, Liang Liu, Zhongfeng Wang, Brian M. Sadler, José Silva-Martínez, Sebastian Hoyos. Compressed Level Crossing Sampling for Ultra-Low Power IoT Devices
2508 -- 2521Abbas Rahimi, Sohum Datta, Denis Kleyko, Edward Paxon Frady, Bruno A. Olshausen, Pentti Kanerva, Jan M. Rabaey. High-Dimensional Computing as a Nanoscalable Paradigm
2522 -- 2531Szu-Chi Chung, Chun-Yuan Yu, Sung-Shine Lee, Hsie-Chia Chang, Chen-Yi Lee. An Improved DPA Countermeasure Based on Uniform Distribution Random Power Generator for IoT Applications
2532 -- 2543Yansong Gao, Hua Ma, Derek Abbott, Said F. Al-Sarawi. PUF Sensor: Exploiting PUF Unreliability for Secure Wireless Sensing
2544 -- 2555Carlos Andres Lara-Nino, Arturo Diaz-Perez, Miguel Morales-Sandoval. Lightweight Hardware Architectures for the Present Cipher in FPGA
2556 -- 2568Yun Wu, John McAllister. Bounded Selective Spanning With Extended Fast Enumeration for MIMO-OFDM Systems Detection
2569 -- 2581Zheng Song, Xiliang Liu, Xiaokun Zhao, Qiongbing Liu, Zongming Jin, Baoyong Chi. A Low-Power NB-IoT Transceiver With Digital-Polar Transmitter in 180-nm CMOS
2582 -- 2590Georgios Angelopoulos, Arun Paidimarri, Muriel Médard, Anantha P. Chandrakasan. A Random Linear Network Coding Accelerator in a 2.4GHz Transmitter for IoT Applications
2591 -- 2597Cheng-Ta Chiang. A CMOS Seawater Salinity to Digital Converter for IoT Applications of Fish Farms
2598 -- 2610Nasim Shafiee, Shikhar Tewari, Benton H. Calhoun, Aatmesh Shrivastava. Infrastructure Circuits for Lifetime Improvement of Ultra-Low Power IoT Devices
2611 -- 2623Ping-Chen Huang, Jan M. Rabaey. A Bio-Inspired Analog Gas Sensing Front End
2624 -- 2637Muhammad Yasin, Temesghen Tekeste, Hani H. Saleh, Baker Mohammad, Ozgur Sinanoglu, Mohammed Ismail. Ultra-Low Power, Secure IoT Platform for Predicting Cardiovascular Diseases

Volume 64-I, Issue 6

1285 -- 1298Yo-Sheng Lin, Van Kien Nguyen. 94-GHz CMOS Power Amplifiers Using Miniature Dual Y-Shaped Combiner With RL Load
1299 -- 1307Zhiqiang Huang, Howard Cam Luong. Design and Analysis of Millimeter-Wave Digitally Controlled Oscillators With C-2C Exponentially Scaling Switched-Capacitor Ladder
1308 -- 1317Hou-Ming Chen, Chang-Chi Lee, Shih-Han Jheng, Wei-Chih Chen, Bo-Yi Lee. A Sub-1 ppm/°C Precision Bandgap Reference With Adjusted-Temperature-Curvature Compensation
1318 -- 1327Sheng-Yu Peng, Li-Han Liu, Pei-Ke Chang, Tzu-Yun Wang, Hao-Yu Li. A Power-Efficient Reconfigurable Output-Capacitor-Less Low-Drop-Out Regulator for Low-Power Analog Sensing Front-End
1328 -- 1341Meng Zhao, Zhongjian Chen, Wengao Lu, Yacong Zhang, Yuze Niu, Guangyi Chen. A High-Voltage Closed-Loop SC Interface for a ± 50 g Capacitive Micro-Accelerometer With 112.4 dB Dynamic Range
1342 -- 1353Stefan Trampitsch, Jovan Markovic, Patrick Obmann, Jonas Fritzin, Jan Zaleski, Christian Mayer, Michael Fulde, Harald Pretl, Andreas Springer, Mario Huemer. A Nonlinear Switched State-Space Model for Capacitive RF DACs
1354 -- 1367Mohsen Hassanpourghadi, Praveen Kumar Sharma, Mike Shuo-Wei Chen. A 6-b, 800-MS/s, 3.62-mW Nyquist Rate AC-Coupled VCO-Based ADC in 65-nm CMOS
1368 -- 1379Je-Kwang Cho. A 2.24-mW, 61.8-dB SNDR, 20-MS/s Pipelined ADC With Charge-Pump-Based Dynamic Biasing for Power Reduction in Op Amp Sharing
1380 -- 1389Deyan Levski, Martin Wany, Bhaskar Choubey. Ramp Noise Projection in CMOS Image Sensor Single-Slope ADCs
1390 -- 1399Hongjia Mo, Michael Peter Kennedy. Masked Dithering of MASH Digital Delta-Sigma Modulators With Constant Inputs Using Multiple Linear Feedback Shift Registers
1400 -- 1408Kwuang-Han Chang, Chih-Cheng Hsieh. A Hybrid Analog-to-Digital Conversion Algorithm With Sub-Radix and Multiple Quantization Thresholds
1409 -- 1420Arnfinn Aas Eielsen, Andrew J. Fleming. Improving Digital-to-Analog Converter Linearity by Large High-Frequency Dithering
1421 -- 1431Stefano Caviglia, Luigi Pinna, Maurizio Valle, Chiara Bartolozzi. Spike-Based Readout of POSFET Tactile Sensors
1432 -- 1443Sai Manoj P. D., Jie Lin, Shikai Zhu, Yingying Yin, Xu Liu, Xiwei Huang, Chongshen Song, Wenqi Zhang, Mei Yan, Zhiyi Yu, Hao Yu. A Scalable Network-on-Chip Microprocessor With 2.5D Integrated Memory and Accelerator
1444 -- 1455Junyoung Ko, Younghwi Yang, Jisu Kim, Younghoon Oh, H. K. Park, Seong-Ook Jung. Incremental Bitline Voltage Sensing Scheme With Half-Adaptive Threshold Reference Scheme in MLC PRAM
1456 -- 1467Xin-Yu Shih, Yue-Qu Liu, Hong-Ru Chou. 3 Design Approaches
1468 -- 1480Amey M. Kulkarni, Tinoosh Mohsenin. Low Overhead Architectures for OMP Compressive Sensing Reconstruction Algorithm
1481 -- 1493Sachin Kumar, Chip-Hong Chang, Thian Fatt Tay. n±1-1} and Its Efficient Hardware Implementation
1494 -- 1503Federico Bizzarri, Angelo Brambilla, Sergio Callegari. N PLL
1504 -- 1514Hamidreza Mafi, Mostafa Yargholi, Mohammad Yavari. Digital Blind Background Calibration of Imperfections in Time-Interleaved ADCs
1515 -- 1528Han Le Duc, Duc-Minh Nguyen, Chadi Jabbour, Patricia Desgreys, Olivier Jamin, Van Tam Nguyen. Fully Digital Feedforward Background Calibration of Clock Skews for Sub-Sampling TIADCs Using the Polyphase Decomposition
1529 -- 1539Rajib Lochan Das, Manish Narwaria. Lorentzian Based Adaptive Filters for Impulsive Noise Environments
1540 -- 1551Fernando Corinto, Mauro Forti. Memristor Circuits: Bifurcations without Parameters
1552 -- 1563Vasileios G. Ntinas, Ioannis Vourkas, Georgios Ch. Sirakoulis, Andrew Adamatzky. Oscillation-Based Slime Mould Electronic Circuit Model for Maze-Solving Computations
1564 -- 1575Giuseppe Fontana, Antonio Luchetta, Stefano Manetti, Maria Cristina Piccirilli. A Fast Algorithm for Testability Analysis of Large Linear Time-Invariant Networks
1576 -- 1587Jorge Fernandez Villena, Luís Miguel Silveira. Circuit Synthesis for Guaranteed Positive Sparse Realization of Passive State-Space Models
1588 -- 1598Jiajia Chen, Jinghong Tan, Chip-Hong Chang, Feng Feng. A New Cost-Aware Sensitivity-Driven Algorithm for the Design of FIR Filters
1599 -- 1611Michael Z. Q. Chen, Kai Wang, Chanying Li, Guanrong Chen. Realization of Biquadratic Impedances as Five-Element Bridge Networks
1612 -- 1625Rémy Vauché, Eloi Muhr, Olivier Fourquin, Sylvain Bourdel, Jean Gaubert, Nicolas Dehaese, Stéphane Meillére, Hervé Barthélemy, Laurent Ouvry. A 100 MHz PRF IR-UWB CMOS Transceiver With Pulse Shaping Capabilities and Peak Voltage Detector
1626 -- 1635Liang Wu, Hiu Fai Leung, Howard C. Luong. Design and Analysis of CMOS LNAs with Transformer Feedback for Wideband Input Matching and Noise Cancellation

Volume 64-I, Issue 5

1017 -- 1018Pedro M. Julian, Lisandro Lovisolo. Guest Editorial Special Section on the 2016 IEEE Latin American Symposium on Circuits and Systems (LASCAS 2016)
1019 -- 1030Benjamin T. Reyes, Raul M. Sanchez, Ariel L. Pola, Mario R. Hueda. Design and Experimental Evaluation of a Time-Interleaved ADC Calibration Algorithm for Application in High-Speed Communication Systems
1031 -- 1039Piotr Patronik, Stanislaw J. Piestrak. Hardware/Software Approach to Designing Low-Power RNS-Enhanced Arithmetic Units
1040 -- 1050Ettore Napoli, Gerardo Castellano, Davide De Caro, Darjn Esposito, Nicola Petra, Antonio Giuseppe Maria Strollo. Single Bit Filtering Circuit Implemented in a System for the Generation of Colored Noise
1051 -- 1063Gordana Jovanovic-Dolecek, Ricardo Garcia Baez, Massimiliano Laddomada. Design of Efficient Multiplierless Modified Cosine-Based Comb Decimation Filters: Analysis and Implementation
1064 -- 1074Felipe Tuyama De Faria Barbosa, Duarte Lopes de Oliveira, Tiago Curtinhas, Lester de Abreu Faria, Jocemar Francisco De Souza Luciano. Implementation of Locally-Clocked XBM State Machines on FPGAs Using Synchronous CAD Tools
1075 -- 1084Ugur Sonmez, Fabio Sebastiano, Kofi A. A. Makinwa. Analysis and Design of VCO-Based Phase-Domain ΣΔ Modulators
1085 -- 1093Chan-Hsiang Weng, Yung-Yu Lin, Tsung-Hsien Lin. A 1-V 5-MHz Bandwidth 68.3-dB SNDR Continuous-Time Delta-Sigma Modulator With a Feedback-Assisted Quantizer
1094 -- 1105Yao-Hong Liu, Johan H. C. van den Heuvel, Takashi Kuramochi, Benjamin Busze, Paul Mateman, Vamshi Krishna Chillara, Bindi Wang, Robert Bogdan Staszewski, Kathleen Philips. An Ultra-Low Power 1.7-2.7 GHz Fractional-N Sub-Sampling Digital Frequency Synthesizer and Modulator for IoT Applications in 40 nm CMOS
1106 -- 1117Chih-Min Chang, Jieh-Tsorng Wu. A 95-dBA DR Digital Audio Class-D Amplifier Using a Calibrated Digital-to-Pulse Converter
1118 -- 1125Pydi Ganga Bahubalindruni, Vitor Grade Tavares, Rodrigo Martins, Elvira Fortunato, Pedro Barquinha. A Low-Power Analog Adder and Driver Using a-IGZO TFTs
1126 -- 1139Mustafa Ozen, Mark P. van der Heijden, Mustafa Acar, Rik Jos, Christian Fager. A Generalized Combiner Synthesis Technique for Class-E Outphasing Transmitters
1140 -- 1151Manh Duy Luong, Ryo Ishikawa, Yoichiro Takayama, Kazuhiko Honjo. Microwave Characteristics of an Independently Biased 3-Stack InGaP/GaAs HBT Configuration
1152 -- 1163Ettore Lorenzo Firrao, Anne-Johan Annema, Frank E. van Vliet, Bram Nauta. Hardware Implementation Overhead of Switchable Matching Networks
1164 -- 1172Esmaeel Maghsoudloo, Masoud Rezaei, Mohamad Sawan, Benoit Gosselin. A High-Speed and Ultra Low-Power Subthreshold Signal Level Shifter
1173 -- 1186Xifan Tang, Edouard Giacomin, Giovanni De Micheli, Pierre-Emmanuel Gaillardon. Circuit Designs of High-Performance and Low-Power RRAM-Based Multiplexers Based on 4T(ransistor)1R(RAM) Programming Structure
1187 -- 1200Davide De Caro, Ettore Napoli, Darjn Esposito, Gerardo Castellano, Nicola Petra, Antonio G. M. Strollo. Minimizing Coefficients Wordlength for Piecewise-Polynomial Hardware Function Evaluation With Exact or Faithful Rounding
1201 -- 1213Mauro Mangia, Fabio Pareschi, Valerio Cambareri, Riccardo Rovatti, Gianluca Setti. Rakeness-Based Design of Low-Complexity Compressed Sensing
1214 -- 1224Chien-Cheng Tseng, Su-Ling Lee. Fractional Hilbert Transform Sampling Method and Its Filter Bank Reconstruction
1225 -- 1234Antonio Buonomo, Alessandro Lo Schiavo. A Study of Injection Locking in Dual-Band CMOS Frequency Dividers
1235 -- 1246Rongrong Qian, Zhisheng Duan, Yuan Qi. 2 Small-Gain Perspective
1247 -- 1259Hong Zhang, Shrirang Abhyankar, Emil M. Constantinescu, Mihai Anitescu. Discrete Adjoint Sensitivity Analysis of Hybrid Dynamical Systems With Switching
1260 -- 1269Alexis Lopez-Riera, Francisco del Águìla López, Pere Palà-Schönwälder, Jordi Bonet-Dalmau, M. Rosa Giralt-Mas, F. Xavier Moncunill-Geniz. Joint Symbol and Chip Synchronization for a Burst-Mode-Communication Superregenerative MSK Receiver
1270 -- 1283Krishna T. Settaluri, Christopher Lalau-Keraly, Eli Yablonovitch, Vladimir Stojanovic. First Principles Optimization of Opto-Electronic Communication Links

Volume 64-I, Issue 4

753 -- 764Federico Butti, Massimo Piotto, Paolo Bruschi. A Chopper Instrumentation Amplifier With Input Resistance Boosting by Means of Synchronous Dynamic Element Matching
765 -- 776Jonghoon Park, Changhyun Lee, Changkun Park. A Quad-Band CMOS Linear Power Amplifier for EDGE Applications Using an Anti-Phase Method to Enhance its Linearity
777 -- 786Bradford L. Hunter, Wallace E. Matthews. A ± 3 ppm/°C Single-Trim Switched Capacitor Bandgap Reference for Battery Monitoring Applications
787 -- 798Peter Luong, Carlos Christoffersen, Conrado Rossi-Aicardi, Carlos Dualibe. Nanopower, Sub-1 V, CMOS Voltage References With Digitally-Trimmable Temperature Coefficients
799 -- 810Kuan Chuang Koay, Pak Kwong Chan. A Low Energy-Noise 65nm CMOS Switched-Capacitor Resistive-Bridge Sensor Interface
811 -- 822Yen-Hsiang Tseng, Che-Wei Yeh, Shen-Iuan Liu. A 2.25-2.7 GHz Area-Efficient Subharmonically Injection-Locked Fractional-N Frequency Synthesizer With a Fast-Converging Correlation Loop
823 -- 835Yong Hun Kim, Tae-Ho Lee, Hyun-Kyu Jeon, Dongil Lee, Lee-Sup Kim. An Input Data and Power Noise Inducing Clock Jitter Tolerant Reference-Less Digital CDR for LCD Intra-Panel Interface
836 -- 846Mina Shahmohammadi, Masoud Babaie, Robert Bogdan Staszewski. Tuning Range Extension of a Transformer-Based Oscillator Through Common-Mode Colpitts Resonance
847 -- 857Hao Cai, You Wang, Lirida Alves de Barros Naviner, Weisheng Zhao. Robust Ultra-Low Power Non-Volatile Logic-in-Memory Circuits in FD-SOI Technology
858 -- 868Keng-Hao Yang, Hsiang-Jen Tsai, Chia-Yin Li, Paul Jendra, Meng-Fan Chang, Tien-Fu Chen. eTag: Tag-Comparison in Memory to Achieve Direct Data Access based on eDRAM to Improve Energy Efficiency of DRAM Cache
869 -- 878Luiz Alberto P. Melek, Anselmo Luis da Silva, Márcio Cherem Schneider, Carlos Galup-Montoro. Analysis and Design of the Classical CMOS Schmitt Trigger in Subthreshold Operation
879 -- 891Vladimir Trujillo-Olaya, Jaime Velasco-Medina. m)
892 -- 905Baozhou Zhu, Yuanwu Lei, Yuanxi Peng, Tingting He. Low Latency and Low Error Floating-Point Sine/Cosine Function Based TCORDIC Algorithm
906 -- 917Khoa Le, Fakhreddine Ghaffari, David Declercq, Bane Vasic. Efficient Hardware Implementation of Probabilistic Gradient Descent Bit-Flipping
918 -- 930Shuichi Ohno, M. Rizwan Tariq. Optimization of Noise Shaping Filter for Quantizer With Error Feedback
931 -- 944Giovanni De Luca, Pascal Bolcato, Remi Larcheveque, Joost Rommes, Wil H. A. Schilders. Fast and Accurate Time-Domain Simulations of Integer-N PLLs
945 -- 958Yanling Wei, Jianbin Qiu, Peng Shi 0001, Mohammed Chadli. Fixed-Order Piecewise-Affine Output Feedback Controller for Fuzzy-Affine-Model-Based Nonlinear Systems With Time-Varying Delay
959 -- 968Wun-Jian Su, Shen-Iuan Liu. A 5 Gb/s Voltage-Mode Transmitter Using Adaptive Time-Based De-Emphasis
969 -- 980Xican Chen, Yiyu Shen, Zhicheng Wang, Woogeun Rhee, Zhihua Wang. A 17 mW 3-to-5 GHz Duty-Cycled Vital Sign Detection Radar Transceiver With Frequency Hopping and Time-Domain Oversampling
981 -- 991Gilbert Matig-a, Mehmet R. Yuce, Jean-Michel Redoute. Design of a CML Transceiver With Self-Immunity to EMI in 0.18-µm CMOS
992 -- 1002Amin Khalili Moghaddam, Joon Huang Chuah, Harikrishnan Ramiah, Jalil Ahmadian, Pui-In Mak, Rui P. Martins. A 73.9%-Efficiency CMOS Rectifier Using a Lower DC Feeding (LDCF) Self-Body-Biasing Technique for Far-Field RF Energy-Harvesting Systems
1003 -- 1012Shang-Hsien Yang, Tsung-Hsun Tsai, Hsin Chen, Chao-Chang Chiu, Ke-Horng Chen, Ying-Hsi Lin, Jian-Ru Lin, Tsung-Yen Tsai. High Accuracy Knee Voltage Detection for Primary-Side Control in Flyback Battery Charger

Volume 64-I, Issue 3

505 -- 515Jia Zhou, Tong Ge, Joseph S. Chang. Printed Electronics: Effects of Bending and a Self-Compensation Means
516 -- 527Brandon Rumberg, David W. Graham, Mir Mohammad Navidi. A Regulated Charge Pump for Tunneling Floating-Gate Transistors
528 -- 536Zhicong Luo, Ming-Dou Ker, Wan-Hsueh Cheng, Ting-Yang Yen. Regulated Charge Pump With New Clocking Scheme for Smoothing the Charging Current in Low Voltage CMOS Process
537 -- 549Liao Wu, Xuan-Dien Do, Sang-Gug Lee, Dong Sam Ha. A Self-Powered and Optimal SSHI Circuit Integrated With an Active Rectifier for Piezoelectric Energy Harvesting
550 -- 561Sami Kurtti, Jan Nissinen, Juha Kostamovaara. A Wide Dynamic Range CMOS Laser Radar Receiver With a Time-Domain Walk Error Compensation Scheme
562 -- 572Jin-Yi Lin, Chih-Cheng Hsieh. A 0.3 V 10-bit SAR ADC With First 2-bit Guess in 90-nm CMOS
573 -- 584Paolo Stefano Crovetti. All-Digital High Resolution D/A Conversion by Dyadic Digital Pulse Modulation
585 -- 595Mohammad Saeed Sarafraz, Mohammad Saleh Tavazoei. Passive Realization of Fractional-Order Impedances by a Fractional Element and RLC Components: Conditions and Procedure
596 -- 607Fang Su, Yongpan Liu, Yiqun Wang, Huazhong Yang. A Ferroelectric Nonvolatile Processor with 46 $\mu $ s System-Level Wake-up Time and 14 $\mu $ s Sleep Time for Energy Harvesting Applications
608 -- 618Chun-Yi Liu, Meng-Siou Sie, Edmund Wen Jen Leong, Yu-Cheng Yao, Chih-Wei Jen, Wei-Chang Liu, Chih-Feng Wu, Shyh-Jye Jou. Dual-Mode All-Digital Baseband Receiver With a Feed-Forward and Shared-Memory Architecture for Dual-Standard Over 60 GHz NLOS Channel
619 -- 629Wenbing Zhang, Yang Tang, Yurong Liu, Jürgen Kurths. Event-Triggering Containment Control for a Class of Multi-Agent Networks With Fixed and Switching Topologies
630 -- 641Lei Yang, Bin Wu, Xiaobin Zhang, Keyue Ma Smedley, Guann-Pyng Li. Dynamic Modeling and Analysis of Constant On Time Variable Frequency One-Cycle Control for Switched-Capacitor Converters
642 -- 652Liang Wu, Hiu Fai Leung, Alvin Li, Howard C. Luong. A 4-Element 60-GHz CMOS Phased-Array Receiver With Beamforming Calibration
653 -- 663Yipeng Wang, Duona Luo, Quan Pan, Liwen Jing, Zhixin Li, C. Patrick Yue. A 60-GHz 4-Gb/s Fully Integrated NRZ-to-QPSK Fiber-Wireless Modulator
664 -- 674Hyosup Won, Joon-Yeong Lee, Taehun Yoon, Kwangseok Han, Sangeun Lee, Jinho Park, Hyeon-Min Bae. A 28-Gb/s Receiver With Self-contained Adaptive Equalization and Sampling Point Control Using Stochastic Sigma-Tracking Eye-Opening Monitor
675 -- 685Marcelo de Souza, Andre A. Mariano, Thierry Taris. Reconfigurable Inductorless Wideband CMOS LNA for Wireless Communications
686 -- 695Anthony Goavec, Mykhailo Zarudniev, Remy Vauche, Frédéric Hameau, Jean Gaubert, Eric Mercier. An Efficient Method of Power Spectral Density Estimation for On-Chip IR-UWB Transmitter Self-Calibration
696 -- 704Daniel Markert, Xin Yu, Holger Heimpel, Georg Fischer. An All-Digital, Single-Bit RF Transmitter for Massive MIMO
705 -- 716Mohammad Alhawari, Baker Mohammad, Hani H. Saleh, Mohammed Ismail. An Efficient Polarity Detection Technique for Thermoelectric Harvester in L-based Converters
717 -- 730Lin Cheng, Wing-Hung Ki, Fan Yang, Philip K. T. Mok, Xiaocheng Jing. Predicting Subharmonic Oscillation of Voltage-Mode Switching Converters Using a Circuit-Oriented Geometrical Approach
731 -- 739Xiu Yin Zhang, Zhi-Xia Du, Quan Xue. High-Efficiency Broadband Rectifier With Wide Ranges of Input Power and Output Load Based on Branch-Line Coupler
740 -- 751Xiao Liu, Aaron M. Cramer, Fei Pan. Generalized Average Method for Time-Invariant Modeling of Inverters

Volume 64-I, Issue 2

245 -- 260Soheil Golara, Shervin Moloudi, Asad A. Abidi. Processes of AM-PM Distortion in Large-Signal Single-FET Amplifiers
261 -- 271Zheng Wang 0014, Payam Heydari. max Frequencies
272 -- 282Ahmed A. Abdelmoaty, Mohammad Al-Shyoukh, Ying-Chih Hsu, Ayman A. Fayed. A MPPT Circuit With 25 µW Power Consumption and 99.7% Tracking Efficiency for PV Systems
283 -- 295Romesh Kumar Nandwana, Saurabh Saxena, Amr Elshazly, Kartikeya Mayaram, Pavan Kumar Hanumolu. A 1-to-2048 Fully-Integrated Cascaded Digital Frequency Synthesizer for Low Frequency Reference Clocks Using Scrambling TDC
296 -- 309Pasindu Aluthwala, Neil Weste, Andrew Adams, Torsten Lehmann, Sri Parameswaran. Partial Dynamic Element Matching Technique for Digital-to-Analog Converters Used for Digital Harmonic-Cancelling Sine-Wave Synthesis
310 -- 321Hesham Omran, Abdulaziz Alhoshany, Hamzah Alahmadi, Khaled N. Salama. A 33fJ/Step SAR Capacitance-to-Digital Converter Using a Chain of Inverter-Based Amplifiers
322 -- 332Dong-Jin Chang, Wan Kim, Min-Jae Seo, Hyeok-Ki Hong, Seung-Tak Ryu. Normalized-Full-Scale-Referencing Digital-Domain Linearity Calibration for SAR ADC
333 -- 346Sotoudeh Hamedi-Hagh. Introducing Suspendance Analysis
347 -- 359Essam S. Atalla, Frank Zhang, Poras T. Balsara, Abdellatif Bellaouar, Seydou Ba, Kamran Kiasaleh. Time-Domain Analysis of Passive Mixer Impedance: A Switched-Capacitor Approach
360 -- 372Khawar Sarfraz, Mansun Chan. A 1.2V-to-0.4V 3.2GHz-to-14.3MHz Power-Efficient 3-Port Register File in 65-nm CMOS
373 -- 385Lauren Guckert, Earl E. Swartzlander Jr.. Optimized Memristor-Based Multipliers
386 -- 398Manish Kumar Jaiswal, Hayden Kwok-Hay So. Area-Efficient Architecture for Dual-Mode Double Precision Floating Point Division
399 -- 408Pramod Kumar Meher, Xin Lou. m) Based on Irreducible All-One Polynomials
409 -- 418Elisardo Antelo, Paolo Montuschi, Alberto Nannarelli. Improved 64-bit Radix-16 Booth Multiplier Based on Partial Product Array Height Reduction
419 -- 431Ju-Hong Lee, Jiun-Shian Du. Lattice Structure Realization for The Design of 2-D Digital Allpass Filters With General Causality
432 -- 445Federico Pepe, Pietro Andreani. A General Theory of Phase Noise in Transconductor-Based Harmonic Oscillators
446 -- 456Yu-Cheng Tsai, Chiao-En Chen, Chia-Hsiang Yang. A Flexible Geometric Mean Decomposition Processor for MIMO Communication Systems
457 -- 470Huang Chang Lee, Mao-Ruei Li, Jyun-Kai Hu, Po-Chiao Chou, Yeong-Luh Ueng. Optimization Techniques for the Efficient Implementation of High-Rate Layered QC-LDPC Decoders
471 -- 479Ali Asghar Razavi Haeri, Mohammadreza Ghaderi Karkani, Mohammad Sharifkhani, Mahmoud Kamarei, Ali Fotowat Ahmady. Analysis and Design of Power Harvesting Circuits for Ultra-Low Power Applications
480 -- 493Lenon Schmitz, Denizar C. Martins, Roberto F. Coelho. Generalized High Step-Up DC-DC Boost-Based Converter With Gain Cell
494 -- 503Giuseppina Monti, Wenquan Che, Qinghua Wang, Alessandra Costanzo, Marco Dionigi, Franco Mastri, Mauro Mongiardo, Renzo Perfetti, Luciano Tarricone, Yumei Chang. Wireless Power Transfer With Three-Ports Networks: Optimal Analytical Solutions

Volume 64-I, Issue 10

2641 -- 2654Liang Qi, Sai-Weng Sin, Seng-Pan U, Franco Maloberti, Rui Paulo Martins. A 4.2-mW 77.1-dB SNDR 5-MHz BW DT 2-1 MASH Δ Σ Modulator With Multirate Opamp Sharing
2655 -- 2665Lieuwe B. Leene, Timothy G. Constandinou. A 0.016 mm2 12 b Δ Σ SAR With 14 fJ/conv. for Ultra Low Power Biosensor Arrays
2666 -- 2678Chun-hsiang Chang, Seyed Alireza Zahrai, Kainan Wang, Li Xu, Ibrahim Farah, Marvin Onabajo. An Analog Front-End Chip With Self-Calibrated Input Impedance for Monitoring of Biosignals via Dry Electrode-Skin Interfaces
2679 -- 2690Subrahmanyam Boyapati, Jean-Michel Redoute, Maryam Shojaei Baghini. Design of A Novel Highly EMI-Immune CMOS Miller OpAmp Considering Channel Length Modulation
2691 -- 2702Sewook Hwang, Junyoung Song, Yeonho Lee, Chulwoo Kim. A 1.62-5.4-Gb/s Receiver for DisplayPort Version 1.2a With Adaptive Equalization and Referenceless Frequency Acquisition Techniques
2703 -- 2713Tongning Hu, Shilei Hao, Qun Jane Gu. Analysis and Design of Bang-Bang PD-Based Phase Noise Filter
2714 -- 2725Shanthi Pavan, Eric A. M. Klumperink. Simplified Unified Analysis of Switched-RC Passive Mixers, Samplers, and N-Path Filters Using the Adjoint Network
2726 -- 2736Nan Zheng, Pinaki Mazumder. Modeling and Mitigation of Static Noise Margin Variation in Subthreshold SRAM Cells
2737 -- 2747Tae-Woo Oh, Hanwool Jeong, Juhyun Park, Seong-Ook Jung. Pre-Charged Local Bit-Line Sharing SRAM Architecture for Near-Threshold Operation
2748 -- 2760Liviu Goras, Paul Ungureanu, Leon O. Chua. On Turing Instability in Nonhomogeneous Reaction-Diffusion CNN's
2761 -- 2771Igor Mishkovski, Miroslav Mirchev, Sanja Scepanovic, Ljupco Kocarev. Interplay Between Spreading and Random Walk Processes in Multiplex Networks
2772 -- 2782Juan E. Machado, Robert Griñó, Nikita Barabanov, Romeo Ortega, Boris T. Polyak. On Existence of Equilibria of Multi-Port Linear AC Networks With Constant-Power Loads
2783 -- 2796Dan Zhang 0001, Zhenhua Xu, Hamid Reza Karimi, Qing-Guo Wang. Distributed Filtering for Switched Linear Systems With Sensor Networks in Presence of Packet Dropouts and Quantization
2797 -- 2805Kehan Zhu, Vishal Saxena. Case Study of a Hybrid Optoelectronic Limiting Receiver
2806 -- 2817Jian Wang 0007, Matthias Korb, Kangli Zhang, Harald Kroll, Qiuting Huang, Jibo Wei. Parallel List Decoding of Convolutional Codes: Algorithm and Implementation

Volume 64-I, Issue 1

1 -- 2Andreas Demosthenous. Update From the Editor-in-Chief
3 -- 13Sandipan Kundu, Subhanshu Gupta, David J. Allstot, Jeyanandh Paramesh. Frequency-Channelized Mismatch-Shaped Quadrature Data Converters for Carrier Aggregation in MU-MIMO LTE-A
14 -- 23Jason Remple, Ian Galton. The Effects of Inter-Symbol Interference in Dynamic Element Matching DACs
24 -- 37Charis Basetas, Thanasis Orfanos, Paul P. Sotiriadis. A Class of 1-Bit Multi-Step Look-Ahead Σ-Δ Modulators
38 -- 49Miron Klosowski, Waldemar Jendernalik, Jacek Jakusz, Grzegorz Blakiewicz, Stanislaw Szczepanski. A CMOS Pixel With Embedded ADC, Digital CDS and Gain Correction Capability for Massively Parallel Imaging Array
50 -- 60Hang Yu, Wei Tang, Menghan Guo, Shoushun Chen. A Two-Step Prediction ADC Architecture for Integrated Low Power Image Sensors
61 -- 71Hugo Serra, Rui Santos-Tavares, Nuno F. Paulino. A Numerical Methodology for the Analysis of Switched-Capacitor Filters Taking Into Account Non-Ideal Effects of Switches and Amplifiers
72 -- 85Chayan Bhawal, Debasattam Pal, Sandeep Kumar, Madhu N. Belur. New Results and Techniques for Computation of Stored Energy in Lossless/All-Pass Systems
86 -- 99Brian Koziel, Reza Azarderakhsh, Mehran Mozaffari Kermani, David Jao. Post-Quantum Cryptography on FPGA Based on Isogenies on Elliptic Curves
100 -- 110Mehrnaz Ahmadi, Bijan Alizadeh, Behjat Forouzandeh. A Hybrid Time Borrowing Technique to Improve the Performance of Digital Circuits in the Presence of Variations
111 -- 121Ahmad Hiasat. A Reverse Converter and Sign Detectors for an Extended RNS Five-Moduli Set
122 -- 132Wang Kang, Tingting Pang, Weifeng Lv, Weisheng Zhao. Dynamic Dual-Reference Sensing Scheme for Deep Submicrometer STT-MRAM
133 -- 144Yao Liu, Ray C. C. Cheung, Hei Wong. A Bias-Bounded Digital True Random Number Generator Architecture
145 -- 155Minhao Yang, Shih-Chii Liu, Tobi Delbrück. Analysis of Encoding Degradation in Spiking Sensors Due to Spike Delay Variation
156 -- 169Jingook Kim. Statistical Analysis for Pattern-Dependent Simultaneous Switching Outputs (SSO) of Parallel Single-Ended Buffers
170 -- 181Yanling Wei, Jianbin Qiu, Hamid Reza Karimi. Reliable Output Feedback Control of Discrete-Time Fuzzy Affine Systems With Actuator Faults
182 -- 194Behrooz Nakhkoob, Mona Mostafa Hella. A 4.7-Gb/s Reconfigurable CMOS Imaging Optical Receiver Utilizing Adaptive Spectrum Balancing Equalizer
195 -- 207Debashis Banerjee, Barry John Muldrey, Xian Wang, Shreyas Sen, Abhijit Chatterjee. Self-Learning RF Receiver Systems: Process Aware Real-Time Adaptation to Channel Conditions for Low Power Operation
208 -- 216Mehran Mozaffari Kermani, Vineeta Singh, Reza Azarderakhsh. Reliable Low-Latency Viterbi Algorithm Architectures Benchmarked on ASIC and FPGA
217 -- 226Abhik Das, Yuan Gao, Tony Tae-Hyoung Kim. A 220-mV Power-on-Reset Based Self-Starter With 2-nW Quiescent Power for Thermoelectric Energy Harvesting Systems
227 -- 240Armine Karami, Dimitri Galayko, Philippe Basset. Series-Parallel Charge Pump Conditioning Circuits for Electrostatic Kinetic Energy Harvesting