Journal: IEEE Trans. Multi-Scale Computing Systems

Volume 4, Issue 4

491 -- 499Yuya Omori, Takayuki Onishi, Hiroe Iwasaki, Atsushi Shimizu. A 120 fps High Frame Rate Real-time HEVC Video Encoder with Parallel Configuration Scalable to 4K
500 -- 512Kah Phooi Seng, Li-minn Ang. A Big Data Layered Architecture and Functional Units for the Multimedia Internet of Things
513 -- 521Dinesh Kumar Vishwakarma, Sakshi Upadhyay. A Deep Structure of Person Re-Identification Using Multi-Level Gaussian Models
522 -- 532Furkan Peker, Mustafa Altun. A Fast Hill Climbing Algorithm for Defect and Variation Tolerant Logic Mapping of Nano-Crossbar Arrays
533 -- 547Ye Yu, Niraj K. Jha. A Monolithic 3D Hybrid Architecture for Energy-Efficient Computation
548 -- 564Arpan Chakraborty, Piyali Datta, Rajat Kumar Pal. A New Fluid-Chip Co-Design for Digital Microfluidic Biochips Considering Cost Drivers and Design Convergence
565 -- 576Nikolaos Tampouratzis, Ioannis Papaefstathiou. A Novel, Simulator for Heterogeneous Cloud Systems that Incorporate Custom Hardware Accelerators
577 -- 592Zhanwei Zhong, Zipeng Li, Krishnendu Chakrabarty. Adaptive and Roll-Forward Error Recovery in MEDA Biochips Based on Droplet-Aliquot Operations and Predictive Analysis
593 -- 604Masayuki Sato 0001, Yoshiki Shoji, Zentaro Sakai, Ryusuke Egawa, Hiroaki Kobayashi. An Adjacent-Line-Merging Writeback Scheme for STT-RAM-Based Last-Level Caches
605 -- 612Keita Azegami, Hayate Okuhara, Hideharu Amano. Body Bias Control for Renewable Energy Source with a High Inner Resistance
613 -- 623Bing Han, Aayush Ankit, Abhronil Sengupta, Kaushik Roy. Cross-Layer Design Exploration for Energy-Quality Tradeoffs in Spiking and Non-Spiking Deep Artificial Neural Networks
624 -- 634Bing Han, Kaushik Roy 0001. DeltaFrame-BP: An Algorithm Using Frame Difference for Deep Convolutional Neural Networks Training and Inference on Video Data
635 -- 648Xiaoyi Lu, Haiyang Shi, Rajarshi Biswas, M. Haseeb Javed, Dhabaleswar K. Panda. DLoBD: A Comprehensive Study of Deep Learning over Big Data Stacks on HPC Clusters
649 -- 661Milad Ghorbani Moghaddam, Wenkai Guan, Cristinel Ababei. Dynamic Energy Optimization in Chip Multiprocessors Using Deep Neural Networks
662 -- 675Suman Karki, Bao Nguyen, Joshua Feener, Kei Davis, Xuechen Zhang. Enforcing End-to-End I/O Policies for Scientific Workflows Using Software-Defined Storage Resource Enclaves
676 -- 685Zhezhi He, Yang Zhang, Shaahin Angizi, Boqing Gong, Deliang Fan. Exploring a SOT-MRAM Based In-Memory Computing for Data Processing
686 -- 697Hsin-Tsung Lin, Pi-Chung Wang. Fast TCAM-Based Multi-Match Packet Classification Using Discriminators
698 -- 710Mohammed Affan Zidan, YeonJoo Jeong, Jong Hoon Shin, Chao Du, Zhengya Zhang, Wei D. Lu. Field-Programmable Crossbar Array (FPCA) for Reconfigurable Computing
711 -- 721Jiliang Zhang 0002, Xiao Tan, Yuanjing Zhang, Weizheng Wang, Zheng Qin. Frequency Offset-Based Ring Oscillator Physical Unclonable Function
722 -- 733Yunfeng Lu, Huaxi Gu, Krishnendu Chakrabarty, Yintang Yang. 2OEIN: A Hierarchical Hybrid Optical/Electrical Interconnection Network for Exascale Computing Systems
734 -- 748Katayoun Neshatpour, Maria Malik, Avesta Sasan, Setareh Rafatirad, Houman Homayoun. Hardware Accelerated Mappers for Hadoop MapReduce Streaming
749 -- 757Ravindra Babu Ganapathi, Aravind Gopalakrishnan, Russell W. McGuire. HPC Process and Optimal Network Device Affinitization
758 -- 772Sai Vineel Reddy Chittamuru, Ishan G. Thakkar, Sudeep Pasricha. LIBRA: Thermal and Process Variation Aware Reliability Management in Photonic Networks-on-Chip
773 -- 783Jiafeng Xie, Pramod Kumar Meher, Xiaojun Zhou, Chiou-Yng Lee. m) Based on Trinomials
784 -- 792Masanori Hayashikoshi, Hideyuki Noda, Hiroyuki Kawai, Yasumitsu Murai, Sugako Otani, Koji Nii, Yoshio Matsuda, Hiroyuki Kondo. Low-Power Multi-Sensor System with Power Management and Nonvolatile Memory Access Control for IoT Applications
793 -- 810Soubhagya Sutar, Arnab Raha, Vijay Raghunathan. Memory-Based Combination PUFs for Device Authentication in Embedded Systems
811 -- 821Wen-Chun Chung, Pei-Yi Cheng, Zipeng Li, Tsung-Yi Ho. Module Placement under Completion-Time Uncertainty in Micro-Electrode-Dot-Array Digital Microfluidic Biochips
822 -- 832Christopher H. Bennett, Jean-Etienne Lorival, François Marc, Theo Cabaret, Bruno Jousselme, Vincent Derycke, Jacques-Olivier Klein, Cristell Maneux. Multiscaled Simulation Methodology for Neuro-Inspired Circuits Demonstrated with an Organic Memristor
833 -- 846Mahyar Shahsavari, Pierre Boulet. Parameter Exploration to Improve Performance of Memristor-Based Neuromorphic Architectures
847 -- 860Hamid Tabani, Jose-Maria Arnau, Jordi Tubella, Antonio González 0001. Performance Analysis and Optimization of Automatic Speech Recognition
861 -- 873Zhenhua Li 0002, Yuanyuan Yang. Placement of Virtual Network Functions in Hybrid Data Center Networks
874 -- 887Venkata Yaswanth Raparti, Sudeep Pasricha. RAPID: Memory-Aware NoC for Latency Optimized GPGPU Architectures
888 -- 899Mohammed Alawad, Mingjie Lin. Scalable FPGA Accelerator for Deep Convolutional Neural Networks with Stochastic Streaming
900 -- 913Zhenbo Qiao, Tao Lu, Huizhang Luo, Qing Liu 0002, Scott Klasky, Norbert Podhorszki, Jinzhen Wang. SIRIUS: Enabling Progressive Data Exploration for Extreme-Scale Scientific Data
914 -- 930Ayten Ozge Akmandor, Hongxu Yin, Niraj K. Jha. Smart, Secure, Yet Energy-Efficient, Internet-of-Things Sensors
931 -- 943Peyman Faizian, Juan Francisco Alfaro, Md Shafayat Rahman, Md Atiqul Mollah, Xin Yuan 0001, Scott Pakin, Michael Lang 0003. TPR: Traffic Pattern-Based Adaptive Routing for Dragonfly Networks
944 -- 951Tiago Mück, Bryan Donyanavard, Kasra Moazzemi, Amir M. Rahmani, Axel Jantsch, Nikil D. Dutt. Design Methodology for Responsive and Rrobust MIMO Control of Heterogeneous Multicores
952 -- 958Milad Ghorbani Moghaddam, Cristinel Ababei. Dynamic Lifetime Reliability Management for Chip Multiprocessors

Volume 4, Issue 3

188 -- 189Ananth Kalyanaraman, Mahantesh Halappanavar. Guest Editorial: Advances in Parallel Graph Processing: Algorithms, Architectures, and Application Frameworks
190 -- 203Somesh Singh, Rupesh Nasre. Scalable and Performant Graph Processing on GPUs Using Approximate Computing
204 -- 216Massimo Bernaschi, Mauro Bisson, Enrico Mastrostefano, Flavio Vella. Multilevel Parallelism for the Exploration of Large-Scale Graphs
217 -- 230Zhao Zhao, Langshi Chen, Mihai Avram, Meng Li, Guanying Wang, Ali Raza Butt, Maleq Khan, Madhav Marathe, Judy Qiu, Anil Vullikanti. Finding and Counting Tree-Like Subgraphs Using MapReduce
231 -- 242Apurba Das, Srikanta Tirthapura. Incremental Maintenance of Maximal Bicliques in a Dynamic Bipartite Graph
243 -- 259Jerónimo Castrillón, Matthias Lieber, Sascha Klüppelholz, Marcus Völp, Nils Asmussen, Uwe Aßmann, Franz Baader, Christel Baier, Gerhard P. Fettweis, Jochen Fröhlich, Andrés Goens, Sebastian Haas, Dirk Habich, Hermann Härtig, Mattis Hasler, Immo Huismann, Tomas Karnagel, Sven Karol, Akash Kumar 0001, Wolfgang Lehner, Linda Leuschner, Siqi Ling, Steffen Märcker, Christian Menard, Johannes Mey, Wolfgang E. Nagel, Benedikt Nöthen, Rafael Peñaloza, Michael Raitza, Jörg Stiller, Annett Ungethüm, Axel Voigt, Sascha Wunderlich. A Hardware/Software Stack for Heterogeneous Systems
260 -- 271Hongxu Yin, Zeyu Wang, Niraj K. Jha. A Hierarchical Inference Model for Internet-of-Things
272 -- 284Somesh Kumar, Rohit Sharma. Analytical Modeling and Performance Benchmarking of On-Chip Interconnects with Rough Surfaces
285 -- 298Vasileios Tsoutsouras, Sotirios Xydis, Dimitrios Soudris. Application-Arrival Rate Aware Distributed Run-Time Resource Management for Many-Core Computing Platforms
299 -- 312Linbin Chen, Jie Han 0001, Weiqiang Liu, Paolo Montuschi, Fabrizio Lombardi. Design, Evaluation and Application of Approximate High-Radix Dividers
313 -- 326Janki Bhimani, Zhengyu Yang, Ningfang Mi, Jingpei Yang, Qiumin Xu, Manu Awasthi, Rajinikanth Pandurangan, Vijay Balakrishnan. Docker Container Scheduler for I/O Intensive Applications Running on NVMe SSDs
327 -- 339Anderson Luiz Sartor, Pedro Henrique Exenberger Becker, Joost Hoozemans, Stephan Wong, Antonio C. S. Beck. Dynamic Trade-off among Fault Tolerance, Energy Consumption, and Performance on a Multiple-Issue VLIW Processor
340 -- 354Simone Casale Brunet, Marco Mattavelli. Execution Trace Graph of Dataflow Process Networks
355 -- 368Maria Malik, Katayoun Neshatpour, Setareh Rafatirad, Houman Homayoun. Hadoop Workloads Characterization for Performance and Energy Efficiency Optimizations on Microservers
369 -- 382Basireddy Karunakar Reddy, Amit Kumar Singh, Dwaipayan Biswas, Geoff V. Merrett, Bashir M. Al-Hashimi. Inter-Cluster Thread-to-Core Mapping and DVFS on Heterogeneous Multi-Cores
383 -- 395Julien Worms, Sid Ahmed Ali Touati. Modelling Program's Performance with Gaussian Mixtures for Parametric Statistics
396 -- 409Umar Ibrahim Minhas, Matthew Russell, Stelios Kaloutsakis, Paul Barber, Roger F. Woods, Giorgis Georgakoudis, Charles Gillan, Dimitrios S. Nikolopoulos, Angelos Bilas. NanoStreams: A Microserver Architecture for Real-Time Analytics on Fast Data Streams
410 -- 419Arsalan Mosenia, Niraj K. Jha. OpSecure: A Secure Unidirectional Optical Channel for Implantable Medical Devices
420 -- 435Arsalan Mosenia, Xiaoliang Dai, Prateek Mittal, Niraj K. Jha. PinMe: Tracking a Smartphone User around the World
436 -- 449Ashur Rafiev, Mohammed A. N. Al-Hayanni, Fei Xia, Rishad A. Shafik, Alexander B. Romanovsky, Alex Yakovlev. Speedup and Power Scaling Models for Heterogeneous Many-Core Systems
450 -- 462Andrew D. Brown, John E. Chad, Raihaan Kamarudin, Kier J. Dugan, Stephen B. Furber. SpiNNaker: Event-Based Simulation - Quantitative Behavior
463 -- 476Yu Bai 0004, Deliang Fan, Mingjie Lin. Stochastic-Based Synapse and Soft-Limiting Neuron with Spintronic Devices for Low Power and Robust Artificial Neural Networks
477 -- 490Yue Hu, David M. Koppelman, Steven R. Brandt. Thoroughly Exploring GPU Buffering Options for Stencil Code by Using an Efficiency Measure and a Performance Model

Volume 4, Issue 2

97 -- 98Sébastien Le Beux, Paul V. Gratz, Ian O'Connor. Guest Editorial: Emerging Technologies and Architectures for Manycore Computing Part 1: Hardware Techniques
99 -- 112Igor Loi, Alessandro Capotondi, Davide Rossi, Andrea Marongiu, Luca Benini. The Quest for Energy-Efficient I$ Design in Ultra-Low-Power Clustered Many-Cores
113 -- 126Weichen Liu, Zhe Wang 0003, Peng Yang 0003, Jiang Xu 0001, Bin Li, Ravi R. Iyer, Ramesh Illikkal. A Systematic and Realistic Network-on-Chip Traffic Modeling and Generation Technique for Emerging Many-Core Systems
127 -- 140Malgorzata Michalska, Simone Casale Brunet, Endri Bezati, Marco Mattavelli. High-Precision Performance Estimation for the Design Space Exploration of Dynamic Dataflow Programs
141 -- 151S. Karen Khatamifard, Ismail Akturk, Ulya R. Karpuzcu. On Approximate Speculative Lock Elision
152 -- 162Zhe Lin 0007, Sharad Sinha, Hao Liang 0003, Liang Feng, Wei Zhang 0012. Scalable Light-Weight Integration of FPGA Based Accelerators with Chip Multi-Processors
163 -- 176Jyothi Krishna Viswakaran Sreelatha, Shankar Balachandran, Rupesh Nasre. CHOAMP: Cost Based Hardware Optimization for Asymmetric Multicore Processors
177 -- 187Asma Benmessaoud Gabis, Pierre Bomel, Marc Sevaux. Bi-Objective Cost Function for Adaptive Routing in Network-on-Chip

Volume 4, Issue 1

1 -- 2Aviral Shrivastava, Fadi J. Kurdahi. Guest Editorial: Special Issue on Accelerated Computing
3 -- 16Marco Lattuada, Fabrizio Ferrandi, Maxime Perrotin. Data Transfers Analysis in Computer Assisted Design Flow of FPGA Accelerators for Aerospace Systems
17 -- 29Mohsen Imani, Abbas Rahimi, Pietro Mercati, Tajana Simunic Rosing. Multi-Stage Tunable Approximate Search in Resistive Associative Memory
30 -- 40Ujjwal Gupta, Raid Ayoub, Michael Kishinevsky, David Kadjo, Niranjan Soundararajan, Ugurkan Tursun, Ümit Y. Ogras. Dynamic Power Budgeting for Mobile Systems Running Graphics Workloads
41 -- 54Sangeet Saha, Arnab Sarkar, Amlan Chakrabarti, Ranjan Ghosh. Co-Scheduling Persistent Periodic and Dynamic Aperiodic Real-Time Tasks on Reconfigurable Platforms
55 -- 68Vinayaka Jyothi, Sateesh Addepalli, Ramesh Karri. DPFEE: A High Performance Scalable Pre-Processor for Network Security Systems
69 -- 82Mohammed Alawad, Mingjie Lin. Memory-Efficient Probabilistic 2-D Finite Impulse Response (FIR) Filter
83 -- 94Michael J. Doyle, Ciaran Tuohy, Michael Manzke. Evaluation of a BVH Construction Accelerator Architecture for High-Quality Visualization