| 10 | -- | 0 | Chia-Heng Tu, Hui-Hsin Hsu, Jen-Hao Chen, Chun-Han Chen, Shih-Hao Hung. Performance and power profiling for emulated Android systems |
| 11 | -- | 0 | Kunal P. Ganeshpure, Sandip Kundu. Performance-driven dynamic thermal management of MPSoC based on task rescheduling |
| 12 | -- | 0 | Brett H. Meyer, Adam S. Hartman, Donald E. Thomas. Cost-effective lifetime and yield optimization for NoC-based MPSoCs |
| 13 | -- | 0 | Jongeun Lee, Seongseok Seo, Jong Kyung Paek, Kiyoung Choi. Configurable range memory for effective data reuse on programmable accelerators |
| 14 | -- | 0 | Eddie Hung, Steven J. E. Wilton. Accelerating FPGA debug: Increasing visibility using a runtime reconfigurable observation and triggering network |
| 15 | -- | 0 | Jacopo Panerati, Giovanni Beltrame. A comparative evaluation of multi-objective exploration algorithms for high-level design |
| 16 | -- | 0 | Seokhyun Lee, Kiyoung Choi. Critical-path-aware high-level synthesis with distributed controller for fast timing closure |
| 17 | -- | 0 | Yaoguang Wei, Cliff C. N. Sze, Natarajan Viswanathan, Zhuo Li, Charles J. Alpert, Lakshmi N. Reddy, Andrew D. Huber, Gustavo E. Téllez, Douglas Keller, Sachin S. Sapatnekar. Techniques for scalable and effective routability evaluation |
| 18 | -- | 0 | Irith Pomeranz. Low-power skewed-load tests based on functional broadside tests |
| 19 | -- | 0 | Irith Pomeranz. Design-for-testability for multi-cycle broadside tests by holding of state variables |
| 20 | -- | 0 | Sounil Biswas, Hongfei Wang, R. D. (Shawn) Blanton. Reducing test cost of integrated, heterogeneous systems using pass-fail test data analysis |
| 21 | -- | 0 | Da-Wei Chang, Hsin-Hung Chen, Dau-Jieu Yang, Hsung-Pin Chang. BLAS: Block-level adaptive striping for solid-state drives |