| 1 | -- | 2 | Phillip Christie. Guest editorial: System-level interconnect prediction |
| 3 | -- | 14 | Yu Cao, Chenming Hu, Xuejue Huang, Andrew B. Kahng, Igor L. Markov, Michael Oliver, Dirk Stroobandt, Dennis Sylvester. Improved a priori interconnect predictions and technology extrapolation in the GTX system |
| 15 | -- | 23 | Raymond A. Wildman, Joshua I. Kramer, Daniel S. Weile, Phillip Christie. Multi-objective optimization of interconnect geometry |
| 24 | -- | 34 | J. Dambre, Peter Verplaetse, Dirk Stroobandt, Jan Van Campenhout. A comparison of various terminal-gate relationships for interconnect prediction in VLSI circuits |
| 35 | -- | 43 | Dirk Stroobandt. A priori wire length distribution models with multiterminal nets |
| 44 | -- | 54 | Arifur Rahman, Shamik Das, Anantha P. Chandrakasan, Rafael Reif. Wiring requirement and three-dimensional integration technology for field programmable gate arrays |
| 55 | -- | 59 | Phillip Christie, José Pineda de Gyvez. Prelayout interconnect yield prediction |
| 60 | -- | 63 | M. Hutton, K. Adibsamii, A. Leaver. Adaptive delay estimation for partitioning-driven PLD placement |
| 64 | -- | 70 | Chulwoo Kim, Ki-Wook Kim, Sung-Mo Kang. Energy-efficient skewed static logic with dual Vt: design and synthesis |
| 71 | -- | 78 | Abdel Ejnioui, N. Ranganathan. Multiterminal net routing for partial crossbar-based multi-FPGA systems |
| 79 | -- | 89 | Ki-Wook Kim, Seong-Ook Jung, Unni Narayanan, C. L. Liu, Sung-Mo Kang. Noise-aware interconnect power optimization in domino logic synthesis |
| 90 | -- | 104 | M. P. Leong, Philip Heng Wai Leong. A variable-radix digit-serial design methodology and its application to the discrete cosine transform |
| 105 | -- | 120 | Arindam Mukherjee, Malgorzata Marek-Sadowska. Wave steering to integrate logic and physical syntheses |
| 121 | -- | 128 | Michael Nicolaidis. Carry checking/parity prediction adders and ALUs |
| 129 | -- | 140 | Ken S. Stevens, Ran Ginosar, Shai Rotem. Relative timing [asynchronous design] |
| 141 | -- | 149 | T. J. Thorp, G. S. Yee, C. M. Sechen. Design and synthesis of dynamic circuits |
| 150 | -- | 153 | Kyung-Saeng Kim, Kwyro Lee. Low-power and area-efficient FIR filter implementation suitable for multiple taps |