Journal: IEEE Trans. VLSI Syst.

Volume 11, Issue 6

965 -- 975Xun Liu, Marios C. Papaefthymiou. Design of a 20-mb/s 256-state Viterbi decoder
976 -- 996Mohammad M. Mansour, Naresh R. Shanbhag. High-throughput LDPC decoders
997 -- 1005Woo-Suk Ko, Joon-Seok Kim, Young-Cheol Park, Tai-Ho Koh, Dae Hee Youn. An efficient DMT modem for the G.LITE ADSL transceiver
1006 -- 1018Joohee Kim, Marios C. Papaefthymiou. Block-based multiperiod dynamic memory design for low data-retention power
1019 -- 1030Daler N. Rakhmatov, Sarma B. K. Vrudhula, Deborah A. Wallach. A model for battery lifetime analysis for organizing applications on a pocket computer
1031 -- 1043Ashok K. Murugavel, N. Ranganathan. A game theoretic approach for power optimization during behavioral synthesis
1044 -- 1057Amit Sinha, Nathan Ickes, Anantha P. Chandrakasan. Instruction level and operating system profiling for energy exposed software
1058 -- 1067C. H.-I. Kim, Hendrawan Soeleman, Kaushik Roy. Ultra-low-power DLMS adaptive filter for hearing aid applications
1068 -- 1079Qinwei Xu, Pinaki Mazumder. Equivalent-circuit interconnect modeling based on the fifth-order differential quadrature methods
1080 -- 1093Volkan Kursun, Eby G. Friedman. Domino logic with variable threshold voltage keeper
1094 -- 1105Shrirang K. Karandikar, Sachin S. Sapatnekar. Technology mapping for SOI domino logic incorporating solutions for the parasitic bipolar effect
1106 -- 1113Rajiv V. Joshi, Ching-Te Chuang, S. K. H. Fung, Fari Assaderaghi, Melanie Sherony, I. Yang, Ghavam V. Shahidi. PD/SOI SRAM performance in presence of gate-to-body tunneling current
1114 -- 1119T. Felicijan, Stephen B. Furber. An asynchronous ternary logic signaling system
1120 -- 1135Saurabh N. Adya, Igor L. Markov. Fixed-outline floorplanning: enabling hierarchical design
1136 -- 1143Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi. Scheduling battery usage in mobile systems
1143 -- 1146M. A. Azadpour, T. S. Kalkur. A clock interconnect extractor for multigigahertz frequencies incorporating inductance effect
1146 -- 1152Li Ding 0002, Pinaki Mazumder. Simultaneous switching noise analysis using application specific device modeling
1153 -- 1158O. Milter, Avinoam Kolodny. Crosstalk noise reduction in synthesized digital logic circuits