Journal: IEEE Trans. VLSI Syst.

Volume 17, Issue 7

853 -- 854Jordi Cortadella, Alexander Taubin. Guest Editorial: Special Section on Asynchronous Circuits and Systems
855 -- 868Victor Khomenko. Efficient Automatic Resolution of Encoding Conflicts Using STG Unfoldings
869 -- 882Sobeeh Almukhaizim, Feng Shi, Eric Love, Yiorgos Makris. Soft-Error Tolerance and Mitigation in Asynchronous Burst-Mode Circuits
883 -- 892Tsung-Te Liu, Louis P. Alarcón, Matthew D. Pierson, Jan M. Rabaey. Asynchronous Computing in Sense Amplifier-Based Pass Transistor Logic
893 -- 906Yvain Thonnart, Edith Beigné, Alexandre Valentian, Pascal Vivet. Power Reduction of Asynchronous Logic Circuits Using Activity Detection
907 -- 919Jeremie Hamon, Laurent Fesquet, Benoit Miscopein, Marc Renaudin. Constrained Asynchronous Ring Structures for Robust Digital Oscillators
920 -- 923C. H. van Berkel, T. A. van Roermund. Scalable Multi-Input-Multi-Output Queues With Application to Variation-Tolerant Architectures
923 -- 928William F. McLaughlin, Amitava Mitra, Steven M. Nowick. Asynchronous Protocol Converters for Two-Phase Delay-Insensitive Global Communication
929 -- 942Hwisung Jung, Massoud Pedram. Uncertainty-Aware Dynamic Power Management in Partially Observable Domains
943 -- 952Yocheved Dotan, Nadav Levison, Roi Avidan, David J. Lilja. History Index of Correct Computation for Fault-Tolerant Nano-Computing
953 -- 963Jie S. Hu, Shuai Wang, Sotirios G. Ziavras. On the Exploitation of Narrow-Width Values for Improving Register File Reliability
964 -- 967Anna Richelli, Luigi Colalongo, Luca Mensi, Alessio Cacciatori, Zsolt Miklós Kovács-Vajna. Charge Pump Architectures Based on Dynamic Gate Control of the Pass-Transistors
967 -- 971Pierantonio Merlino, Antonio Abramo. A Fully Pipelined Architecture for the LOCO-I Compression Algorithm