| 1525 | -- | 1534 | Milin Zhang, Amine Bermak. Quadrant-Based Online Spatial and Temporal Compressive Acquisition for CMOS Image Sensor |
| 1535 | -- | 1548 | Vikram Pudi, K. Sridharan. Efficient Design of a Hybrid Adder in Quantum-Dot Cellular Automata |
| 1549 | -- | 1558 | Tobias Strauch. Multi-FPGA System With Unlimited and Self-Timed Wave-Pipelined Multiplexed Routing |
| 1559 | -- | 1568 | Fang Tang, Amine Bermak. A 4T Low-Power Linear-Output Current-Mediated CMOS Image Sensor |
| 1569 | -- | 1582 | Paolo Magnone, Felice Crupi, Massimo Alioto, Ben Kaczer, Brice De Jaeger. Understanding the Potential and the Limits of Germanium pMOSFETs for VLSI Circuits From Experimental Measurements |
| 1583 | -- | 1596 | John C. Koob, Sue Ann Ung, Bruce F. Cockburn, Duncan G. Elliott. Design and Characterization of a Multilevel DRAM |
| 1597 | -- | 1609 | Avesta Sasan, Houman Homayoun, Ahmed M. Eltawil, Fadi J. Kurdahi. Inquisitive Defect Cache: A Means of Combating Manufacturing Induced Process Variation |
| 1610 | -- | 1616 | Kailash Chandrashekar, Bertan Bakkaloglu. A 10 b 50 MS/s Opamp-Sharing Pipeline A/D With Current-Reuse OTAs |
| 1617 | -- | 1626 | Yufu Zhang, Ankur Srivastava. Accurate Temperature Estimation Using Noisy Thermal Sensors for Gaussian and Non-Gaussian Cases |
| 1627 | -- | 1640 | Guihai Yan, Yinhe Han, Xiaowei Li. SVFD: A Versatile Online Fault Detection Scheme via Checking of Stability Violation |
| 1641 | -- | 1654 | Krutartha Patel, Sri Parameswaran, Roshan G. Ragel. Architectural Frameworks for Security and Reliability of MPSoCs |
| 1655 | -- | 1666 | Qi Wu, Tong Zhang. Design Techniques to Facilitate Processor Power Delivery in 3-D Processor-DRAM Integrated Systems |
| 1667 | -- | 1680 | Rajeev K. Nain, Malgorzata Chrzanowska-Jeske. Fast Placement-Aware 3-D Floorplanning Using Vertical Constraints on Sequence Pairs |
| 1681 | -- | 1694 | Yi-Ying Tsai, Chung-Ho Chen. Energy-Efficient Trace Reuse Cache for Embedded Processors |
| 1695 | -- | 1703 | Naveen Verma. Analysis Towards Minimization of Total SRAM Energy Over Active and Idle Operating Modes |
| 1704 | -- | 1717 | Ahmad Atghiaee, Nasser Masoumi. A Predictive and Accurate Interconnect Density Function: The Core of a Novel Interconnect-Centric Prediction Engine |
| 1718 | -- | 1722 | Won-Joo Yun, Hyun-Woo Lee, Dongsuk Shin, Suki Kim. A 3.57 Gb/s/pin Low Jitter All-Digital DLL With Dual DCC Circuit for GDDR3 DRAM in 54-nm CMOS Technology |
| 1723 | -- | 1726 | Upavan Gupta, Nagarajan Ranganathan. A Utilitarian Approach to Variation Aware Delay, Power, and Crosstalk Noise Optimization |
| 1727 | -- | 1730 | Jaydeep P. Kulkarni, Ashish Goel, Patrick Ndai, Kaushik Roy. A Read-Disturb-Free, Differential Sensing 1R/1W Port, 8T Bitcell Array |