| 605 | -- | 613 | Kanad Basu, Prabhat Mishra. RATS: Restoration-Aware Trace Signal Selection for Post-Silicon Validation |
| 614 | -- | 623 | Feng Liang, Luwen Zhang, ShaoChong Lei, Guohe Zhang, Kaile Gao, Bin Liang. Test Patterns of Multiple SIC Vectors: Theory and Application in BIST Schemes |
| 624 | -- | 635 | Ya-Ting Shyu, Jai-Ming Lin, Chun-Po Huang, Cheng-Wu Lin, Ying-Zu Lin, Soon-Jyh Chang. Effective and Efficient Approach for Power Reduction by Using Multi-Bit Flip-Flops |
| 636 | -- | 647 | Gwo-Long Li, Tzu-Yu Chen, Meng-Wei Shen, Meng-Hsun Wen, Tian-Sheuan Chang. 135-MHz 258-K Gates VLSI Design for All-Intra H.264/AVC Scalable Video Encoder |
| 648 | -- | 658 | Tasreen Charania, Ajoy Opal, Manoj Sachdev. Analysis and Design of On-Chip Decoupling Capacitors |
| 659 | -- | 669 | Yupeng Chen, Bertil Schmidt, Douglas L. Maskell. Reconfigurable Accelerator for the Word-Matching Stage of BLASTN |
| 670 | -- | 679 | Koushik Chakraborty, Sanghamitra Roy. Architecturally Homogeneous Power-Performance Heterogeneous Multicore Systems |
| 680 | -- | 691 | Selçuk Köse, Simon Tam, Sally Pinzon, Bruce McDermott, Eby G. Friedman. Active Filter-Based Hybrid On-Chip DC-DC Converter for Point-of-Load Voltage Regulation |
| 692 | -- | 705 | Katherine Shu-Min Li. CusNoC: Fast Full-Chip Custom NoC Generation |
| 706 | -- | 719 | Liang Shi, Jianhua Li, Chun Jason Xue, Xuehai Zhou. Cooperating Virtual Memory and Write Buffer Management for Flash-Based Storage Systems |
| 720 | -- | 731 | Kai-Jiun Yang, Shang-Ho Tsai, Gene C. H. Chuang. MDC FFT/IFFT Processor With Variable Length for MIMO-OFDM Systems |
| 732 | -- | 746 | Hesam Amir Aslanzadeh, Erik John Pankratz, Chinmaya Mishra, Edgar Sánchez-Sinencio. Current-Reused 2.4-GHz Direct-Modulation Transmitter With On-Chip Automatic Tuning |
| 747 | -- | 760 | Yen-Liang Chen, Cheng-Zhou Zhan, Ting-Jyun Jheng, An-Yeu Wu. Reconfigurable Adaptive Singular Value Decomposition Engine Design for High-Throughput MIMO-OFDM Systems |
| 761 | -- | 770 | David B. Thomas, Wayne Luk. The LUT-SR Family of Uniform Random Number Generators for FPGA Architectures |
| 771 | -- | 775 | Yangyang Pan, Yiran Li, Hongbin Sun, Wei Xu, Nanning Zheng, Tong Zhang 0002. Exploring the Use of Emerging Nonvolatile Memory Technologies in Future FPGAs |
| 776 | -- | 780 | Irith Pomeranz. Broadside and Skewed-Load Tests Under Primary Input Constraints |
| 781 | -- | 785 | Yasuhiro Ogasahara, Masanori Hashimoto, Toshiki Kanamoto, Takao Onoye. Supply Noise Suppression by Triple-Well Structure |
| 786 | -- | 790 | Giorgos Theodorou, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos. Software-Based Self Test Methodology for On-Line Testing of L1 Caches in Multithreaded Multicore Architectures |
| 791 | -- | 0 | Keshab K. Parhi. Comments on "Low-energy CSMT carry generators and binary adders" |