393 | -- | 412 | Yehea I. Ismail. Editorial Appointments for the 2013-2014 Term |
413 | -- | 423 | Shi-Hao Chen, Youn-Long Lin, Mango Chia-Tso Chao. Power-Up Sequence Control for MTCMOS Designs |
424 | -- | 433 | S. Man Ho Ho, Yanqing Ai, Thomas Chun-Pong Chau, Steve C. L. Yuen, Oliver Chiu-sing Choy, Philip Heng Wai Leong, Kong-Pang Pun. Architecture and Design Flow for a Highly Efficient Structured ASIC |
434 | -- | 442 | Santosh Ghosh, Debdeep Mukhopadhyay, Dipanwita Roy Chowdhury. Secure Dual-Core Cryptoprocessor for Pairings Over Barreto-Naehrig Curves on FPGA Platform |
443 | -- | 453 | Jhih-Wei You, Shi-Yu Huang, Yu-Hsiang Lin, Meng-Hsiu Tsai, Ding-Ming Kwai, Yung-Fa Chou, Cheng-Wen Wu. In-Situ Method for TSV Delay Testing and Characterization Using Input Sensitivity Analysis |
454 | -- | 464 | Sehun Kook, Hyun Woo Choi, Abhijit Chatterjee. Low-Resolution DAC-Driven Linearity Testing of Higher Resolution ADCs Using Polynomial Fitting Measurements |
465 | -- | 474 | Hsiu-Ming Chang, Jiun-Lang Huang, Ding-Ming Kwai, Kwang-Ting Cheng, Cheng-Wen Wu. Low-Cost Error Tolerance Scheme for 3-D CMOS Imagers |
475 | -- | 485 | Irith Pomeranz. Computing Two-Pattern Test Cubes for Transition Path Delay Faults |
486 | -- | 497 | Erin G. Fong, Nathaniel J. Guilar, Travis Kleeburg, Hai Pham, Diego R. Yankelevich, Rajeevan Amirtharajah. Integrated Energy-Harvesting Photodiodes With Diffractive Storage Capacitance |
498 | -- | 511 | Levent Aksoy, Cristiano Lazzari, Eduardo Costa, Paulo F. Flores, José Monteiro. Design of Digit-Serial FIR Filters: Algorithms, Architectures, and a CAD Tool |
512 | -- | 522 | Josep Rius. IR-Drop in On-Chip Power Distribution Networks of ICs With Nonuniform Power Consumption |
523 | -- | 532 | Cha-Ru Li, Wai-Kei Mak, Ting-Chi Wang. Fast Fixed-Outline 3-D IC Floorplanning With TSV Co-Placement |
533 | -- | 545 | Hailong Jiao, Volkan Kursun. Reactivation Noise Suppression With Sleep Signal Slew Rate Modulation in MTCMOS Circuits |
546 | -- | 553 | Kwan Wai Li, Ka Nang Leung, Lincoln Lai Kan Leung. Sub-mW $LC$ Dual-Input Injection-Locked Oscillator for Autonomous WBSNs |
554 | -- | 565 | Pierce Chuang, David Li, Manoj Sachdev. Constant Delay Logic Style |
566 | -- | 570 | Sebastian Höppner, Holger Eisenreich, Stephan Henker, Dennis Walter, Georg Ellguth, René Schüffny. A Compact Clock Generator for Heterogeneous GALS MPSoCs in 65-nm CMOS Technology |
571 | -- | 574 | Emad Ebrahimi, Sasan Naseh. A Colpitts CMOS Quadrature VCO Using Direct Connection of Substrates for Coupling |
575 | -- | 579 | Sewook Hwang, Kyeong-Min Kim, Jungmoon Kim, Seon Wook Kim, Chulwoo Kim. A Self-Calibrated DLL-Based Clock Generator for an Energy-Aware EISC Processor |
580 | -- | 584 | Abhishek A. Sinkar, Taejoon Park, Nam Sung Kim. Clamping Virtual Supply Voltage of Power-Gated Circuits for Active Leakage Reduction and Gate-Oxide Reliability |
584 | -- | 588 | Guan-Ying Huang, Soon-Jyh Chang, Chun-Cheng Liu, Ying-Zu Lin. 10-bit 30-MS/s SAR ADC Using a Switchback Switching Method |
589 | -- | 592 | Te-Wen Liao, Jun-Ren Su, Chung-Chih Hung. Spur-Reduction Frequency Synthesizer Exploiting Randomly Selected PFD |
593 | -- | 596 | Xiwen Zhang, Hoi Lee. Gain-Enhanced Monolithic Charge Pump With Simultaneous Dynamic Gate and Substrate Control |
597 | -- | 601 | Jinn-Shyan Wang, Keng-Jui Chang, Chingwei Yeh, Shih-Chieh Chang. Embedding Repeaters in Silicon IPs for Cross-IP Interconnections |