Journal: IEEE Trans. VLSI Syst.

Volume 21, Issue 5

793 -- 806Supriya Karmakar, John A. Chandy, Faquir C. Jain. Design of Ternary Logic Combinational Circuits Based on Quantum Dot Gate FETs
807 -- 820Haitham Eissa, Rami Fathy Salem, Ahmed Arafa, Sherif Hany, Abdelrahman ElMously, Mohamed Dessouky, David Nairn, Mohab H. Anis. Parametric DFM Solution for Analog Circuits: Electrical-Driven Hotspot Detection, Analysis, and Correction Flow
821 -- 833Song Jin, Yinhe Han, Huawei Li, Xiaowei Li 0001. Unified Capture Scheme for Small Delay Defect Detection and Aging Prediction
834 -- 847Mojtaba Mahdavi, Mahdi Shabany. Novel MIMO Detection Algorithm for High-Order Constellations in the Complex Domain
848 -- 861Mahdi Shabany, Ameer Youssef, P. Glenn Gulak. High-Throughput 0.13-µm CMOS Lattice Reduction Core Supporting 880 Mb/s Detection
862 -- 874Dae-Hyun Kim, Krit Athikulwongse, Sung Kyu Lim. Study of Through-Silicon-Via Impact on the 3-D Stacked IC Layout
875 -- 886Shen-Fu Hsiao, Hou-Jen Ko, Yu-Ling Tseng, Wen-Liang Huang, Shin-Hung Lin, Chia-Sheng Wen. Design of Hardware Function Evaluators Using Low-Overhead Nonuniform Segmentation With Address Remapping
887 -- 900Behnam Ghavami, Mohsen Raji, Hossein Pedram, Massoud Pedram. Statistical Functional Yield Estimation and Enhancement of CNFET-Based VLSI Circuits
901 -- 909Sujoy Sinha Roy, Chester Rebeiro, Debdeep Mukhopadhyay. Theoretical Modeling of Elliptic Curve Scalar Multiplier on LUT-Based FPGAs for Area and Speed
910 -- 920Suhaib A. Fahmy, A. R. Mohan. Architecture for Real-Time Nonparametric Probability Density Function Estimation
921 -- 933Jinwook Oh, Seungjin Lee, Hoi-Jun Yoo. 1.2-mW Online Learning Mixed-Mode Intelligent Inference Engine for Low-Power Real-Time Object Recognition Processor
934 -- 943Ali Peiravi, Mohammad Asyaei. Current-Comparison-Based Domino: New Low-Leakage High-Speed Domino Circuit for Wide Fan-In Gates
944 -- 957Zhigang Hao, Guoyong Shi, Sheldon X.-D. Tan, Esteban Tlelo-Cuautle. Symbolic Moment Computation for Statistical Analysis of Large Interconnect Networks
958 -- 970Aida Todri, Alberto Bosio, Luigi Dilillo, Patrick Girard, Arnaud Virazel. Uncorrelated Power Supply Noise and Ground Bounce Consideration for Test Pattern Generation
971 -- 974Hiroaki Inoue, Takashi Takenaka, Masato Motomura. C-Based Complex Event Processing on Reconfigurable Hardware
974 -- 978Wei Zhang, Hao Wang, Boyang Pan. Reduced-Complexity LCC Reed-Solomon Decoder Based on Unified Syndrome Computation
979 -- 983Asaf Kaizerman, Sagi Fisher, Alexander Fish. Subthreshold Dual Mode Logic
983 -- 987Renatas Jakushokas, Eby G. Friedman. Power Network Optimization Based on Link Breaking Methodology