Journal: IEEE Trans. VLSI Syst.

Volume 25, Issue 2

393 -- 401Reza Zendegani, Mehdi Kamal, Milad Bahadori, Ali Afzali-Kusha, Massoud Pedram. RoBA Multiplier: A Rounding-Based Approximate Multiplier for High-Speed yet Energy-Efficient Digital Signal Processing
402 -- 415Kwen-Siong Chong, Weng-Geng Ho, Tong Lin, Bah-Hwee Gwee, Joseph S. Chang. Sense Amplifier Half-Buffer (SAHB) A Low-Power High-Performance Asynchronous Logic QDI Cell Template
416 -- 426Srikar Bhagavatula, Byunghoo Jung. Variation Resilient Power Sensor With an 80-ns Response Time for Fine-Grained Power Management
427 -- 440Amir M. Rahmani, Mohammad Hashem Haghbayan, Antonio Miele, Pasi Liljeberg, Axel Jantsch, Hannu Tenhunen. Reliability-Aware Runtime Power Management for Many-Core Systems in the Dark Silicon Era
441 -- 449Shoaleh Hashemi Namin, Huapeng Wu, Majid Ahmadi. Low-Power Design for a Digit-Serial Polynomial Basis Finite Field Multiplier Using Factoring Technique
450 -- 461Sundarrajan Rangachari, Jaiganesh Balakrishnan, Nitin Chandrachoodan. Scenario-Aware Dynamic Power Reduction Using Bias Addition
462 -- 475Arnab Raha, Swagath Venkataramani, Vijay Raghunathan, Anand Raghunathan. Energy-Efficient Reduce-and-Rank Using Input-Adaptive Approximations
476 -- 487Hooman Farkhani, Mohammad Tohidi, Ali Peiravi, Jens Kargaard Madsen, Farshad Moradi. STT-RAM Energy Reduction Using Self-Referenced Differential Write Termination Technique
488 -- 501Chien-Chung Ho, Yu-Ping Liu, Yuan-Hao Chang, Tei-Wei Kuo. Antiwear Leveling Design for SSDs With Hybrid ECC Capability
502 -- 509Robert Giterman, Lior Atias, Adam Teman. Area and Energy-Efficient Complementary Dual-Modular Redundancy Dynamic Memory for Space Applications
510 -- 519Chihiro Matsui, Asuka Arakawa, Chao Sun, Ken Takeuchi. Write Order-Based Garbage Collection Scheme for an LBA Scrambler Integrated SSD
520 -- 533Naifeng Jing, Shunning Jiang, Shuang Chen, Jingjie Zhang, Li Jiang, Chao Li, Xiaoyao Liang. Bank Stealing for a Compact and Efficient Register File Architecture in GPGPU
534 -- 546Nishit Ashok Kapadia, Sudeep Pasricha. A Runtime Framework for Robust Application Scheduling With Adaptive Parallelism in the Dark-Silicon Era
547 -- 555Reiley Jeyapaul, Roberto Flores, Alfonso Avila, Aviral Shrivastava. Systematic Methodology for the Quantitative Analysis of Pipeline-Register Reliability
556 -- 569Zhonghai Lu, Yuan Yao. Dynamic Traffic Regulation in NoC-Based Systems
570 -- 580Kamran Rahmani, Sandip Ray, Prabhat Mishra. Postsilicon Trace Signal Selection Using Machine Learning Techniques
581 -- 593Shao-Yun Fang, Kuo-Hao Wu. Cut Mask Optimization With Wire Planning in Self-Aligned Multiple Patterning Full-Chip Routing
594 -- 607Artjom Grudnitsky, Lars Bauer, Jörg Henkel. Efficient Partial Online Synthesis of Special Instructions for Reconfigurable Processors
608 -- 620Itamar Levi, Alexander Fish, Osnat Keren. CPA Secured Data-Dependent Delay-Assignment Methodology
621 -- 634I-Jen Chao, Bin-Da Liu, Soon-Jyh Chang, Chun-Yueh Huang, Hsin-Wen Ting. Analyses of Splittable Amplifier Technique and Cancellation of Memory Effect for Opamp Sharing
635 -- 647Massoud Tohidian, Iman Madadi, Robert Bogdan Staszewski. A Fully Integrated Discrete-Time Superheterodyne Receiver
648 -- 659Isaak Yang, Sung Hoon Jung, Kwang-Hyun Cho. Self-Repairing Digital System Based on State Attractor Convergence Inspired by the Recovery Process of a Living Cell
660 -- 669Randy W. Mann, William McMahon, Yoann Mamy Randriamihaja, Yuncheng Song, Ajay Anand Kallianpur, Sheng Xie, Akhilesh Gautam, Joseph Versaggi, Biju Parameshwaran, Chad E. Weintraub. Bias-Induced Healing of $V_{\text {min}}$ Failures in Advanced SRAM Arrays
670 -- 682Zhan-Hui Li, Tao-Tao Zhu, Zhi-Jian Chen, Jian-yi Meng, Xiao-Yan Xiang, Xiao-lang Yan. Eliminating Timing Errors Through Collaborative Design to Maximize the Throughput
683 -- 695Yingnan Cui, Wei Zhang, Bingsheng He. A Variation-Aware Adaptive Fuzzy Control System for Thermal Management of Microprocessors
696 -- 704Michael Cheah, Debashis Mandal, Bertan Bakkaloglu, Sayfe Kiaei. pp Ripple Digitally Controlled LDO With Active Ripple Suppression
705 -- 713Ata Khorami, Mohammad Sharifkhani. An Efficient Fast Switching Procedure for Stepwise Capacitor Chargers
714 -- 724Jian-Bin Zhou, Dajiang Zhou, Shihao Wang, Shuping Zhang, Takeshi Yoshimura, Satoshi Goto. A Dual-Clock VLSI Design of H.265 Sample Adaptive Offset Estimation for 8k Ultra-HD TV Encoding
725 -- 734Pingxiuqi Chen, Shaik Nazeem Basha, Mehran Mozaffari Kermani, Reza Azarderakhsh, Jiafeng Xie. FPGA Realization of Low Register Systolic All-One-Polynomial Multipliers Over $GF(2^{m})$ and Their Applications in Trinomial Multipliers
735 -- 746Chiou-Yng Lee, Pramod Kumar Meher, Chia-Chen Fan, Shyan-Ming Yuan. Low-Complexity Digit-Serial Multiplier Over $GF(2^{m})$ Based on Efficient Toeplitz Block Toeplitz Matrix-Vector Product Decomposition
747 -- 759Zhiheng Wang, Ryan N. Goh, Kia Bazargan, Arnd Scheel, Naman Saraf. Stochastic Implementation and Analysis of Dynamical Systems Similar to the Logistic Map
760 -- 764Moon Gi Seok, Tag Gon Kim, Chang Beom Choi, Daejin Park. An HLA-Based Distributed Cosimulation Framework in Mixed-Signal System-on-Chip Design
765 -- 768Leonardo Rezende Juracy, Matheus Trevisan Moreira, Felipe Augusto Kuentzer, Alexandre de Morais Amory. Optimized Design of an LSSD Scan Cell
769 -- 773Hailang Wang, Emre Salman. Closed-Form Expressions for I/O Simultaneous Switching Noise Revisited
774 -- 778Derui Kong, Dongwon Seo, Sang Min Lee. Analysis and Reduction of Nonidealities in Stacked-Transistor Current Sources
779 -- 782Ji Hoon Park, Hyun-Seung Seo, Bai-Sun Kong. Conditional-Boosting Flip-Flop for Near-Threshold Voltage Application
783 -- 787Chung-Shiang Wu, Hui-Hsuan Lee, Po-Hung Chen, Wei Hwang. Digital Buck Converter With Switching Loss Reduction Scheme for Light Load Efficiency Enhancement
788 -- 792Kihwan Seong, Won-Cheol Lee, Byungsub Kim, Jae-Yoon Sim, Hong June Park. All-Synthesizable Current-Mode Transmitter Driver for USB2.0 Interface