| 1193 | -- | 1203 | Naeem Maroof, Bai-Sun Kong. DD Precharge and Row-Wise Dynamically Powered Read Port for Low Switching Power and Ultralow RBL Leakage |
| 1204 | -- | 1214 | Raf Appeltans, Praveen Raghavan, Gouri Sankar Kar, Arnaud Furnemont, Liesbet Van der Perre, Wim Dehaene. A Smaller, Faster, and More Energy-Efficient Complementary STT-MRAM Cell Uses Three Transistors and a Ground Grid: More Is Actually Less |
| 1215 | -- | 1223 | Donkyu Baek, Naehyuck Chang, Donghwa Shin. Compressed On-Chip Framebuffer Cache for Low-Power Display Systems |
| 1224 | -- | 1235 | Fernando Garcia-Redondo, Pablo Royer, Marisa López-Vallejo, Hernan Aparicio, Pablo Ituero, Carlos A. López-Barrio. Reconfigurable Writing Architecture for Reliable RRAM Operation in Wide Temperature Ranges |
| 1236 | -- | 1249 | Ju Hee Choi, Jong Wook Kwak. Fast Writeable Block-Aware Cache Update Policy for Spin-Transfer-Torque RAM |
| 1250 | -- | 1260 | Peter G. Sarson, Gregor Schatzberger, Friedrich Peter Leisenberger. Fast Bit Screening of Automotive Grade EEPROMs - Continuous Improvement Exercise |
| 1261 | -- | 1270 | Abdul Hafiz Alameh, Frederic Nabki. A 0.13-µm CMOS Dynamically Reconfigurable Charge Pump for Electrostatic MEMS Actuation |
| 1271 | -- | 1284 | Sae Kyu Lee, Tao Tong, Xuan Zhang, David M. Brooks, Gu-Yeon Wei. A 16-Core Voltage-Stacked System With Adaptive Clocking and an Integrated Switched-Capacitor DC-DC Converter |
| 1285 | -- | 1296 | Lili Song, Ying Wang, Yinhe Han, Huawei Li, Yuanqing Cheng, Xiaowei Li. STT-RAM Buffer Design for Precision-Tunable General-Purpose Neural Network Accelerator |
| 1297 | -- | 1306 | Xiaoyin Bai, Zhi-Hui Kong, Liter Siek. A High-Efficiency 6.78-MHz Full Active Rectifier With Adaptive Time Delay Control for Wireless Power Transmission |
| 1307 | -- | 1319 | Chio-In Ieong, Mingzhong Li, Man Kay Law, Pui-In Mak, Mang I Vai, Rui Paulo Martins. A 0.45 V 147-375 nW ECG Compression Processor With Wavelet Shrinkage and Adaptive Temporal Decimation Architectures |
| 1320 | -- | 1328 | Mahmoud Meribout, Samir Teniou. A Pipelined Parallel Hardware Architecture for 2-D Real-Time Electrical Capacitance Tomography Imaging Using Interframe Correlation |
| 1329 | -- | 1341 | Yufeng Tong, Wei Zhang, Yung-Cheng Ma, Yanyan Liu, Yu Liang, Tai Zhang, Haowen Luo. Compiler-Guided Parallelism Adaption Based on Application Partition for Power-Gated ILP Processor |
| 1342 | -- | 1351 | Xinmiao Zhang, Ying Tai. Low-Complexity Transformed Encoder Architectures for Quasi-Cyclic Nonbinary LDPC Codes Over Subfields |
| 1352 | -- | 1361 | Omid Akbari, Mehdi Kamal, Ali Afzali-Kusha, Massoud Pedram. Dual-Quality 4: 2 Compressors for Utilizing in Dynamic Accuracy Configurable Multipliers |
| 1362 | -- | 1372 | Weijing Shi, Xin Li, Zhiyi Yu, Gary Overett. An FPGA-Based Hardware Accelerator for Traffic Sign Detection |
| 1373 | -- | 1385 | Dong Wang, Xiao Liang Tan, Pak Kwong Chan. A 65-nm CMOS Constant Current Source With Reduced PVT Variation |
| 1386 | -- | 1396 | Pil-Ho Lee, Han-Yeol Lee, Hyun Bae Lee, Young-Chan Jang. An On-Chip Monitoring Circuit for Signal-Integrity Analysis of 8-Gb/s Chip-to-Chip Interfaces With Source-Synchronous Clock |
| 1397 | -- | 1407 | Vasileios Tenentes, Daniele Rossi, Sheng Yang, S. Saqib Khursheed, Bashir M. Al-Hashimi, Steve R. Gunn. Coarse-Grained Online Monitoring of BTI Aging by Reusing Power-Gating Infrastructure |
| 1408 | -- | 1420 | Reza Ramezani, Yasser Sedaghat, Juan Antonio Clemente. Reliability Improvement of Hardware Task Graphs via Configuration Early Fetch |
| 1421 | -- | 1432 | Rajendra Bishnoi, Fabian Oboril, Mehdi Baradaran Tahoori. Design of Defect and Fault-Tolerant Nonvolatile Spintronic Flip-Flops |
| 1433 | -- | 1443 | Jie Guo, Danghui Wang, Zili Shao, Yiran Chen. Data-Pattern-Aware Error Prevention Technique to Improve System Reliability |
| 1444 | -- | 1454 | Innocent Agbo, Mottaqiallah Taouil, Daniel Kraak, Said Hamdioui, Halil Kukner, Pieter Weckx, Praveen Raghavan, Francky Catthoor. Integral Impact of BTI, PVT Variation, and Workload on SRAM Sense Amplifier |
| 1455 | -- | 1466 | Hiromitsu Awano, Shumpei Morita, Takashi Sato. Scalable Device Array for Statistical Characterization of BTI-Related Parameters |
| 1467 | -- | 1476 | Manjari Pradhan, Bhargab B. Bhattacharya. COMEDI: Combinatorial Election of Diagnostic Vectors From Detection Test Sets for Logic Circuits |
| 1477 | -- | 1489 | Yun-Jui Li, Ching-Yi Huang, Chia-Cheng Wu, Yung-Chih Chen, Chun-Yao Wang, Suman Datta, Vijaykrishnan Narayanan. Dynamic Diagnosis for Defective Reconfigurable Single-Electron Transistor Arrays |
| 1490 | -- | 1496 | Hyuk Ryu, Eun-Taek Sung, Sangyong Park, Je-Kwang Cho, Donghyun Baek. Fast Automatic Frequency Calibrator Using an Adaptive Frequency Search Algorithm |
| 1497 | -- | 1505 | Shraddha Bodhe, Irith Pomeranz, M. Enamul Amyeen, Srikanth Venkataraman. Reordering Tests for Efficient Fail Data Collection and Tester Time Reduction |
| 1506 | -- | 1519 | Yu Liu, Yier Jin, Aria Nosratinia, Yiorgos Makris. Silicon Demonstration of Hardware Trojan Design and Detection in Wireless Cryptographic ICs |
| 1520 | -- | 1527 | Jiliang Zhang, Lele Liu. Publicly Verifiable Watermarking for Intellectual Property Protection in FPGA Design |
| 1528 | -- | 1536 | Anita Aghaie, Mehran Mozaffari Kermani, Reza Azarderakhsh. Fault Diagnosis Schemes for Low-Energy Block Cipher Midori Benchmarked on FPGA |
| 1537 | -- | 1548 | Dwaipayan Biswas, Koushik Maharatna, Goran Panic, Evangelos B. Mazomenos, Josy Achner, Jasmin Klemke, Michael Jöbges, Steffen Ortmann. Low-Complexity Framework for Movement Classification Using Body-Worn Sensors |
| 1549 | -- | 1562 | Sumeet S. Kumar, Amir Zjajo, René van Leuken. Fighting Dark Silicon: Toward Realizing Efficient Thermal-Aware 3-D Stacked Multiprocessors |
| 1563 | -- | 1567 | Mohammad Ali Montazerolghaem, Tohid Moosazadeh, Mohammad Yavari. A Single Channel Split ADC Structure for Digital Background Calibration in Pipelined ADCs |
| 1568 | -- | 1572 | Bhagyaraja Adapa, Dwaipayan Biswas, Swati Bhardwaj, Shashank Raghuraman, Amit Acharyya, Koushik Maharatna. Coordinate Rotation-Based Low Complexity K-Means Clustering Architecture |
| 1573 | -- | 1577 | Yeongkyo Seo, Xuanyao Fong, Kaushik Roy 0001. Fast and Disturb-Free Nonvolatile Flip-Flop Using Complementary Polarizer MTJ |
| 1578 | -- | 1582 | Hayate Okuhara, Yu Fujita, Kimiyoshi Usami, Hideharu Amano. Power Optimization Methodology for Ultralow Power Microcontroller With Silicon on Thin BOX MOSFET |
| 1583 | -- | 1587 | Ali Ahmed, Kyungbae Park, Sanghyeon Baeg. Resource-Efficient SRAM-Based Ternary Content Addressable Memory |
| 1588 | -- | 1592 | Hyeonggyu Kim, Soontae Kim, Jooheung Lee. Write-Amount-Aware Management Policies for STT-RAM Caches |