Chuan Seng Tan - researchr alias

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Viewing Publication 1 - 21 from 21

2021

Multi-Die to Wafer Bonding Through Plasma-Activated Cu-Cu Direct Bonding in Ambient ConditionsLiangxing Hu, Simon Chun Kiat Goh, Yu Dian Lim, Peng Zhao, Michael Joo Zhong Lim, Chuan Seng Tan. 3dic 2021: 1-5 [doi]

2020

Monolithically Integrated GaN+CMOS Logic Circuits Design and Electro-Thermal Analysis for High-Voltage ApplicationsPilsoon Choi, Bugra Kanargi, Kenneth E. Lee, Chirn Chye Boon, Evelyn Wang, Chuan Seng Tan, Dimitri A. Antoniadis, Eugene A. Fitzgerald. bcicts 2020: 1-4 [doi]

2019

2018

Two-Step Fabrication of Mid-Infrared Linear Variable Optical Filter Using SU-8 as MaskSimon Chun Kiat Goh, Li Lynn Shiau, Nan Chen, Kailiang Chuan, Beng Kang Tay, Chuan Seng Tan. nems 2018: 652-655 [doi]

2017

Yield Enhancement of Face-to-Face Cu-Cu Bonding With Dual-Mode Transceivers in 3DICsMyat Thu Linn Aung, Takefumi Yoshikawa, Chuan Seng Tan, Tony Tae-Hyoung Kim. tvlsi, 25(3):1023-1031, 2017. [doi]

2016

Non-destructive degradation study of copper wire bond for its temperature cycling reliability evaluationMarvin Chan, Cher Ming Tan, Kheng Chooi Lee, Chuan Seng Tan. mr, 61:56-63, 2016. [doi]

Through-substrate via (TSV) with embedded capacitor as an on-chip energy storage elementYe-Lin, Chuan Seng Tan. 3dic 2016: 1-4 [doi]

2015

Copper micro and nano particles mixture for 3D interconnections applicationYuan Yuan Dai, Mei Zhen Ng, P. Anantha, Chee Lip Gan, Chuan Seng Tan. 3dic 2015: [doi]

2014

Simulation and design of AIN piezoelectric resonator for infrared sensing application utilizing lamb wave modeWan Chia Ang, Piotr Kropelmcki, Andrew Benson Randies, Yuandong Alex Gu, Kam Chew Leong, Chuan Seng Tan. issnip 2014: 1-6 [doi]

Robust Electromigration reliability through engineering optimizationWee Loon Ng, Kheng Chok Tee, Junfeng Liu, Yong Chiang Ee, Oliver Aubel, Chuan Seng Tan, Kin Leong Pey. mr, 54(9-10):1666-1670, 2014. [doi]

2013

Reliable 3-D Clock-Tree Synthesis Considering Nonlinear Capacitive TSV Model With Electrical-Thermal-Mechanical CouplingSai Manoj Pudukotai Dinakarrao, Hao Yu, Yang Shang, Chuan Seng Tan, Sung Kyu Lim. tcad, 32(11):1734-1747, 2013. [doi]

Thermal-reliable 3D clock-tree synthesis considering nonlinear electrical-thermal-coupled TSV modelYang Shang, Chun Zhang, Hao Yu, Chuan Seng Tan, Xin Zhao, Sung Kyu Lim. aspdac 2013: 693-698 [doi]

2011

Integration schemes and enabling technologies for three-dimensional integrated circuitsKuan-Neng Chen, Chuan Seng Tan. iet-cdt, 5(3):160-168, 2011. [doi]

Three-Dimensional Integration of Integrated Circuits - an IntroductionChuan Seng Tan. In Abbas Sheibanyrad, Frédéric Pétrot, Axel Jantsch, editors, 3D Integration for NoC-based SoC Architectures. Integrated Circuits and Systems, pages 3-26, Springer, 2011. [doi]

2010

Fine-pitch bump-less Cu-Cu bonding for wafer-on-wafer stacking and its quality enhancementLan Peng, HongYu Li, Dau Fatt Lim, Riko I. Made, Guo-Qiang Lo, Dim-Lee Kwong, Chuan Seng Tan. 3dic 2010: 1-5 [doi]

2009

Achieving low temperature Cu to Cu diffusion bonding with self assembly monolayer (SAM) passivationDau Fatt Lim, Shiv Govind Singh, Xiao Fang Ang, Jun Wei, Chee Mang Ng, Chuan Seng Tan. 3dic 2009: 1-5 [doi]

Impact of thermal through silicon via (TTSV) on the temperature profile of multi-layer 3-D device stackShiv Govind Singh, Chuan Seng Tan. 3dic 2009: 1-4 [doi]

2006

Multi-layer 3D silicon electronics enabled by wafer bondingChuan Seng Tan. PhD thesis, Massachusetts Institute of Technology, Cambridge, MA, USA, 2006. [doi]

2004

Technology, performance, and computer-aided design of three-dimensional integrated circuitsShamik Das, Andy Fan, Kuan-Neng Chen, Chuan Seng Tan, Nisha Checka, Rafael Reif. ispd 2004: 108-115 [doi]

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