| 1209 | -- | 1222 | Ping-Lin Yang, Malgorzata Marek-Sadowska. High-Performance Architecture Using Fast Dynamic Reconfigurable Accelerators |
| 1223 | -- | 1232 | Govinda Sannena, Bishnu Prasad Das. Low Overhead Warning Flip-Flop Based on Charge Sharing for Timing Slack Monitoring |
| 1233 | -- | 1240 | Cheng-Hung Lin, Sze-Chen Cho, Shih-Chieh Chang. An Adaptive Mechanism for Designing Efficient Snoop Filters |
| 1241 | -- | 1253 | Jaemin Kim, Donkyu Baek, Caiwen Ding, Sheng Lin, Donghwa Shin, Xue Lin, Yanzhi Wang, Youngjin Cho, Sang-Hyun Park, Naehyuck Chang. Dynamic Reconfiguration of Thermoelectric Generators for Vehicle Radiators Energy Harvesting Under Location-Dependent Temperature Variations |
| 1254 | -- | 1267 | Hayate Okuhara, Akram Ben Ahmed, Johannes Maximilian Kühn, Hideharu Amano. Asymmetric Body Bias Control With Low-Power FD-SOI Technologies: Modeling and Power Optimization |
| 1268 | -- | 1276 | Yu Lei, Houpeng Chen, Xiaoyun Li, Xi Li, Qian Wang, Qi Zhang, Jie Miao, Zhitang Song. A Changing-Reference Parasitic-Matching Sensing Circuit for 3-D Vertical RRAM |
| 1277 | -- | 1289 | Xiaowei Chen, Seyed Alireza Pourbakhsh, Jingyan Fu, Na Gong, Jinhui Wang. A Novel Hybrid Delay Unit Based on Dummy TSVs for 3-D On-Chip Memory |
| 1290 | -- | 1300 | Manqing Mao, Shimeng Yu, Chaitali Chakrabarti. Design and Analysis of Energy-Efficient and Reliable 3-D ReRAM Cross-Point Array System |
| 1301 | -- | 1311 | Yinqi Tang, Naveen Verma. Energy-Efficient Pedestrian Detection System: Exploiting Statistical Error Compensation for Lossy Memory Data Compression |
| 1312 | -- | 1325 | Hao Zhou 0008, Hengliang Zhu, Tao Cui, David Z. Pan, Dian Zhou, Xuan Zeng 0001. Thermal Stress and Reliability Analysis of TSV-Based 3-D ICs With a Novel Adaptive Strategy Finite Element Method |
| 1326 | -- | 1339 | Siting Liu, Jie Han 0001. Toward Energy-Efficient Stochastic Circuits Using Parallel Sobol Sequences |
| 1340 | -- | 1353 | Wim Meeus, Dirk Stroobandt. Data Reuse Buffer Synthesis Using the Polyhedral Model |
| 1354 | -- | 1367 | Yufei Ma, Yu Cao 0001, Sarma B. K. Vrudhula, Jae-sun Seo. Optimizing the Convolution Operation to Accelerate Deep Neural Networks on FPGA |
| 1368 | -- | 1376 | Davide Bellizia, Simone Bongiovanni, Pietro Monsurrò, Giuseppe Scotti, Alessandro Trifiletti, Francesco Bruno Trotta. Secure Double Rate Registers as an RTL Countermeasure Against Power Analysis Attacks |
| 1377 | -- | 1390 | Claude Thibeault, Ghyslain Gagnon. On the Analysis and the Mitigation of Power Supply Noise and Power Distribution Network Impedance Variation for Scan-Based Delay Testing Techniques |
| 1391 | -- | 1402 | Chun-Hsing Li, Wei-Min Wu. A Balunless Frequency Multiplier With Differential Output by Current Flow Manipulation |
| 1403 | -- | 1407 | Lei Wang 0070, Chundong Wu, Lisong Feng, Alan Chang, Yong Lian. A Low-Power Forward and Reverse Body Bias Generator in CMOS 40 nm |
| 1408 | -- | 1412 | Xiaobai Chen, Zhiyi Yu. A Flexible and Energy-Efficient Convolutional Neural Network Acceleration With Dedicated ISA and Accelerator |