Journal: IEEE Trans. VLSI Syst.

Volume 29, Issue 12

2013 -- 2026Vaibhav Venugopal Rao, Ioannis Savidis. Performance and Security Analysis of Parameter-Obfuscated Analog Circuits
2027 -- 2039Shanshi Huang, Hongwu Jiang, Xiaochen Peng, Wantong Li, Shimeng Yu. Secure XOR-CIM Engine: Compute-In-Memory SRAM Architecture With Embedded XOR Encryption
2040 -- 2051Sina Sayyah Ensan, Karthikeyan Nagarajan, Mohammad Nasim Imtiaz Khan, Swaroop Ghosh. SCARE: Side Channel Attack on In-Memory Computing for Reverse Engineering
2052 -- 2063Soner Seçkiner, Selçuk Köse. Preprocessing of the Physical Leakage Information to Combine Side-Channel Distinguishers
2064 -- 2075Turki Alnuayri, S. Saqib Khursheed, Antonio Leonel Hernández Martínez, Daniele Rossi 0001. Differential Aging Sensor Using Subthreshold Leakage Current to Detect Recycled ICs
2076 -- 2085Sandeep Kumar, Atin Mukherjee 0001. A Highly Robust and Low-Power Real-Time Double Node Upset Self-Healing Latch for Radiation-Prone Applications
2086 -- 2097Saurabh Kumar, Minki Cho, Luke R. Everson, Andres Malavasi, Dan Lake, Carlos Tokunaga, Muhammad M. Khellah, James W. Tschanz, Vivek De, Chris H. Kim. A Back-Sampling Chain Technique for Accelerated Detection, Characterization, and Reconstruction of Radiation-Induced Transient Pulses
2098 -- 2109Jaewon Choi, Nam-Seog Kim. A Spurious and Oscillator Pulling Free CMOS Quadrature LO-Generator for Cellular NB-IoT
2110 -- 2118Juncheng Wang, XueFeng Chen, Rui Bai, Patrick Yin Chiang, Quan Pan. A 4 × 10 Gb/s Adaptive Optical Receiver Utilizing Current-Reuse and Crosstalk-Remove
2119 -- 2129Zakaria El Alaoui Ismaili, Wessam Ajib, Frederic Nabki, François Gagnon. A 0.1-9-GHz Frequency Synthesizer for Avionic SDR Applications in 0.13-μm CMOS Technology
2130 -- 2142Mohamed Elshamy, Alhassan Sayed, Marie-Minerve Louërat, Hassan Aboushady, Haralampos-G. Stratigopoulos. Locking by Untuning: A Lock-Less Approach for Analog and Mixed-Signal IC Security
2143 -- 2152Kentaro Yoshioka. VCO-Based Comparator: A Fully Adaptive Noise Scaling Comparator for High-Precision and Low-Power SAR ADCs
2153 -- 2162Zule Xu, Naoki Ojima, Shuowei Li, Tetsuya Iizuka. An All-Standard-Cell-Based Synthesizable SAR ADC With Nonlinearity-Compensated RDAC
2163 -- 2171Islam Mansour, Marwa Mansour, Mohamed Aboualalaa, Ahmed Allam, Adel B. Abdel-Rahman, Ramesh K. Pokharel, Mohammed Abo-Zahhad. A Multiband VCO Using a Switched Series Resonance for Fine Frequency Tuning Sensitivity and Phase Noise Improvement
2172 -- 2185Chua-Chin Wang, Lean Karlo S. Tolentino, Chia-Yi Huang, Chia-Hung Yeh. A 40-nm CMOS Multifunctional Computing-in-Memory (CIM) Using Single-Ended Disturb-Free 7T 1-Kb SRAM
2186 -- 2196Nicholas Jao, Akshay Krishna Ramanathan, John Sampson, Vijaykrishnan Narayanan. Sparse Vector-Matrix Multiplication Acceleration in Diode-Selected Crossbars
2197 -- 2209Ming Ling, Qingde Lin, Ke Tan, Tianxiang Shao, Shan Shen, Jun Yang 0006. A Design of Timing Speculation SRAM-Based L1 Caches With PVT Autotracking Under Near-Threshold Voltages
2210 -- 2219Xinyu Du, Lidan Wang, Dengwei Yan, Shukai Duan. A Multiring Julia Fractal Chaotic System With Separated-Scroll Attractors
2220 -- 2228Juan Sebastian P. Giraldo, Vikram Jain, Marian Verhelst. Efficient Execution of Temporal Convolutional Networks for Embedded Keyword Spotting