| 447 | -- | 460 | Hasan Erdem Yantir, Ahmed M. Eltawil, Khaled N. Salama. IMCA: An Efficient In-Memory Convolution Accelerator |
| 461 | -- | 471 | Steven Colleman, Marian Verhelst. High-Utilization, High-Flexibility Depth-First CNN Coprocessor for Image Pixel Processing on FPGA |
| 472 | -- | 484 | Dawen Xu 0002, Ziyang Zhu, Cheng Liu, Ying Wang 0001, Shuang Zhao, Lei Zhang 0008, Huaguo Liang, Huawei Li, Kwang-Ting Cheng. Reliability Evaluation and Analysis of FPGA-Based Neural Network Acceleration System |
| 485 | -- | 498 | Shamik Kundu, Suvadeep Banerjee, Arnab Raha, Suriyaprakash Natarajan, Kanad Basu. Toward Functional Safety of Systolic Array-Based Deep Learning Hardware Accelerators |
| 499 | -- | 511 | Taehwan Kim 0007, Heechun Park, Taewhan Kim. Allocation of Always-On State Retention Storage for Power Gated Circuits - Steady-State- Driven Approach |
| 512 | -- | 518 | Isaak Yang, Kwang-Hyun Cho. A Low-Power Timing-Error-Tolerant Circuit by Controlling a Clock |
| 519 | -- | 529 | Yi-Wen Hung, Yung-Chih Chen, Chi Lo, Austin Go So, Shih-Chieh Chang. Dynamic Workload Allocation for Edge Computing |
| 530 | -- | 543 | Mengting Yan, Haoran Wei, Marvin Onabajo. On-Chip Thermal Profiling to Detect Malicious Activity: System-Level Concepts and Design of Key Building Blocks |
| 544 | -- | 557 | Chris Nigh, Alex Orailoglu. AdaTrust: Combinational Hardware Trojan Detection Through Adaptive Test Pattern Construction |
| 558 | -- | 567 | Yuri Ardesi, Giovanna Turvani, Mariagrazia Graziano, Gianluca Piccinini. SCERPA Simulation of Clocked Molecular Field-Coupling Nanocomputing |
| 568 | -- | 579 | Chenxi Zhao, Jiawei Guo, Huihua Liu, Yiming Yu, Yunqiu Wu, Kai Kang. A 33-41-GHz SiGe-BiCMOS Digital Step Attenuator With Minimized Unit Impedance Variation |
| 580 | -- | 590 | Charalampos Antoniadis, Nestor E. Evmorfopoulos, Georgios I. Stamoulis. Graph-Based Sparsification and Synthesis of Dense Matrices in the Reduction of RLC Circuits |