| 1039 | -- | 1051 | Kamlesh Singh, Barry de Bruin, Hailong Jiao, Jos Huisken, Henk Corporaal, José Pineda de Gyvez. Converter-Free Power Delivery Using Voltage Stacking for Near/Subthreshold Operation |
| 1052 | -- | 1060 | Yin Sun, JongJoo Lee, Chulsoon Hwang. A Generalized Power Supply Induced Jitter Model Based on Power Supply Rejection Ratio Response |
| 1061 | -- | 1072 | Ruzica Jevtic, Marko Ylitolva, Clara Calonge, Martti Ojanen, Tero Säntti, Lauri Koskinen. EM Side-Channel Countermeasure for Switched-Capacitor DC-DC Converters Based on Amplitude Modulation |
| 1073 | -- | 1082 | Zhen Gao, Lingling Zhang, Yinghao Cheng, Kangkang Guo, Anees Ullah, Pedro Reviriego. Design of FPGA-Implemented Reed-Solomon Erasure Code (RS-EC) Decoders With Fault Detection and Location on User Memory |
| 1083 | -- | 1094 | Dongyun Kam, Hoyoung Yoo, Youngjoo Lee. Ultralow-Latency Successive Cancellation Polar Decoding Architecture Using Tree-Level Parallelism |
| 1095 | -- | 1107 | Zhuojun Chen, Judi Zhang, Shuangchun Wen, Ya Li, Qinghui Hong. Competitive Neural Network Circuit Based on Winner-Take-All Mechanism and Online Hebbian Learning Rule |
| 1108 | -- | 1121 | John Reuben, Stefan Pechmann. Accelerated Addition in Resistive RAM Array Using Parallel-Friendly Majority Gates |
| 1122 | -- | 1131 | Pablo Ilha Vaz, Patrick Girard 0001, Arnaud Virazel, Hassen Aziza. Improving TID Radiation Robustness of a CMOS OxRAM-Based Neuron Circuit by Using Enclosed Layout Transistors |
| 1132 | -- | 1140 | Firat Celik, Ayca Akkaya, Armin Tajalli, Yusuf Leblebici. A 32-Gb/s PAM-4 SST Transmitter With Four-Tap FFE Using High-Impedance Driver in 28-nm FDSOI |
| 1141 | -- | 1151 | Jérémy Nadal, Amer Baghdadi. Parallel and Flexible 5G LDPC Decoder Architecture Targeting FPGA |
| 1152 | -- | 1163 | Lingjun Zhu, Lennart Bamberg, Sai Surya Kiran Pentapati, Kyungwook Chang, Francky Catthoor, Dragomir Milojevic, Manu Komalan, Brian Cline, Saurabh Sinha, Xiaoqing Xu, Alberto García Ortiz, Sung Kyu Lim. High-Performance Logic-on-Memory Monolithic 3-D IC Designs for Arm Cortex-A Processors |
| 1164 | -- | 1177 | Jungil Mok, Hyeonchan Lim, Sungho Kang. Enhanced Postbond Test Architecture for Bridge Defects Between the TSVs |
| 1178 | -- | 1191 | Chung-Kuan Cheng, Chia-Tung Ho, Daeyeal Lee, Bill Lin, Dongwon Park. Complementary-FET (CFET) Standard Cell Synthesis Framework for Design and System Technology Co-Optimization Using SMT |
| 1192 | -- | 1205 | Suchang Kim, Seungho Na, Byeong Yong Kong, Jaewoong Choi, In-Cheol Park. Real-Time SSDLite Object Detection on FPGA |
| 1206 | -- | 1219 | Febin P. Sunny, Asif Mirza, Ishan G. Thakkar, Mahdi Nikdast, Sudeep Pasricha. ARXON: A Framework for Approximate Communication Over Photonic Networks-on-Chip |
| 1220 | -- | 1230 | Wenbo Guo 0009, Shuguo Li. Fast Binary Counters and Compressors Generated by Sorting Network |
| 1231 | -- | 1243 | Tanfer Alan, Andreas Gerstlauer, Jörg Henkel. Cross-Layer Approximate Hardware Synthesis for Runtime Configurable Accuracy |
| 1244 | -- | 1256 | I-Ju Wang, Yu-Pei Liang, Tseng-Yi Chen, Yuan-Hao Chang 0001, Bo-Jun Chen, Hsin-Wen Wei, Wei Kuan Shih. Enabling Write-Reduction Multiversion Scheme With Efficient Dual-Range Query Over NVRAM |
| 1257 | -- | 1270 | Jin-Tai Yan. Via-Minimization-Oriented Region Routing Under Length-Matching Constraints in Rapid Single-Flux-Quantum Circuits |
| 1271 | -- | 1284 | Guilherme Cardoso Medeiros, Moritz Fieback, Lizhou Wu, Mottaqiallah Taouil, Letícia Maria Bolzani Poehls, Said Hamdioui. Hard-to-Detect Fault Analysis in FinFET SRAMs |