Journal: IEEE Trans. VLSI Syst.

Volume 30, Issue 2

113 -- 122Lianxi Liu, Yaling Ji, Xufeng Liao, Zhenghe Qin, Hongzhi Liang. A 0.8-V, 2.55-GHz, 2.62-mW Charge-Pump PLL With High Spectrum Purity
123 -- 133Liang Fang, Xianshan Wen, Tao Fu, Guanhua Wang, Sandeep Miryala, Tiehui Ted Liu, Ping Gui. S in 65-nm CMOS
134 -- 142Zhong Zhang 0002, Qi Yu 0002, Qihui Zhang, Jing Li 0022, Kejun Wu, Ning Ning 0002. A Code-Recombination Algorithm-Based ADC With Feature Extraction for WBSN Applications
143 -- 152Jahyun Koo 0001, Jae-Yoon Sim. Low-Noise Distributed RC Oscillator
153 -- 165Shinya Kajiyama, Yutaka Igarashi, Toru Yazaki, Yusaku Katsube, Takuma Nishimoto, Tatsuo Nakagawa, Yohei Nakamura, Yoshihiro Hayashi, Takuya Kaneko, Hiroki Ishikuro, Taizo Yamawaki. T/R Switch Composed of Three HV-MOSFETs With 12.1-μW Consumption That Enables Per-Channel Self-Loopback AC Tests and -18.1-dB Switching Noise Suppression for 3-D Ultrasound Imaging With 3072-Ch Transceiver
166 -- 176Rohit B. Chaurasiya, Rahul Shrestha. Hardware-Efficient VLSI Architecture and ASIC Implementation of GRCR-Based Cooperative Spectrum Sensor for Cognitive-Radio Network
177 -- 186Pietro Nannipieri, Stefano Di Matteo, Luca Baldanzi, Luca Crocetti, Luca Zulberti, Sergio Saponara, Luca Fanucci. VLSI Design of Advanced-Features AES Cryptoprocessor in the Framework of the European Processor Initiative
187 -- 200Trevor Kroeger, Wei Cheng, Sylvain Guilley, Jean-Luc Danger, Naghmeh Karimi. Assessment and Mitigation of Power Side-Channel-Based Cross-PUF Attacks on Arbiter-PUFs and Their Derivatives
201 -- 212Dionysios Filippas, Nikolaos Margomenos, Nikolaos Mitianoudis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos. Low-Cost Online Convolution Checksum Checker
213 -- 226Wei Mao, Kai Li, Quan Cheng, Liuyao Dai, Boyu Li, Xinang Xie, He Li 0008, Longyang Lin, Hao Yu 0001. A Configurable Floating-Point Multiple-Precision Processing Element for HPC and AI Converged Computing
227 -- 237Zhiqiang Que, Hiroki Nakahara, Eriko Nurvitadhi, Andrew Boutros, Hongxiang Fan, Chenglong Zeng, Jiuxi Meng, Kuen Hung Tsoi, Xinyu Niu, Wayne Luk. Recurrent Neural Networks With Column-Wise Matrix-Vector Multiplication on FPGAs
238 -- 242Zunsong Yang, Yong Chen 0005, Jia Yuan, Pui-In Mak, Rui Paulo Martins. A 3.3-GHz Integer N-Type-II Sub-Sampling PLL Using a BFSK-Suppressed Push-Pull SS-PD and a Fast-Locking FLL Achieving -82.2-dBc REF Spur and -255-dB FOM
243 -- 247Botao Xiong, Yukun Li, Sicun Li, Sheng Fan, Yuchun Chang. Half-Precision Logarithmic Arithmetic Unit Based on the Fused Logarithmic and Antilogarithmic Converter
248 -- 252Yosef Lempel, Rinat Breuer, Joseph Shor. A 700-μm², Ring-Oscillator-Based Thermal Sensor in 16-nm FinFET