Design optimization of gate-silicided ESD NMOSFETs in a 45 nm bulk CMOS technology

David Alvarez, Kiran V. Chatty, Christian Russ, Michel J. Abou-Khalil, Junjun Li, Robert Gauthier, Kai Esmark, Ralph Halbach, Christopher Seguin. Design optimization of gate-silicided ESD NMOSFETs in a 45 nm bulk CMOS technology. Microelectronics Reliability, 49(12):1417-1423, 2009. [doi]

Abstract

Abstract is missing.