Fast Unified Floorplan Topology Generation and Sizing on Heterogeneous FPGAs

Pritha Banerjee, Susmita Sur-Kolay, Arijit Bishnu. Fast Unified Floorplan Topology Generation and Sizing on Heterogeneous FPGAs. IEEE Trans. on CAD of Integrated Circuits and Systems, 28(5):651-661, 2009. [doi]

Abstract

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