Reordering Tests for Efficient Fail Data Collection and Tester Time Reduction

Shraddha Bodhe, Irith Pomeranz, M. Enamul Amyeen, Srikanth Venkataraman. Reordering Tests for Efficient Fail Data Collection and Tester Time Reduction. IEEE Trans. VLSI Syst., 25(4):1497-1505, 2017. [doi]

@article{BodhePAV17,
  title = {Reordering Tests for Efficient Fail Data Collection and Tester Time Reduction},
  author = {Shraddha Bodhe and Irith Pomeranz and M. Enamul Amyeen and Srikanth Venkataraman},
  year = {2017},
  doi = {10.1109/TVLSI.2016.2628321},
  url = {http://doi.ieeecomputersociety.org/10.1109/TVLSI.2016.2628321},
  researchr = {https://researchr.org/publication/BodhePAV17},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. VLSI Syst.},
  volume = {25},
  number = {4},
  pages = {1497-1505},
}