Migrating from planar to FinFET for further CMOS scaling: SOI or bulk?

Thomas Chiarella, Liesbeth Witters, Abdelkarim Mercha, C. Kerner, R. Dittrich, Michal Rakowski, C. Ortolland, L.-Å. Ragnarsson, Bertrand Parvais, A. De Keersgieter, S. Kubicek, A. Redolfi, R. Rooyackers, C. Vrancken, S. Brus, A. Lauwers, Philippe Absil, S. Biesemans, Thomas K. Hoffmann. Migrating from planar to FinFET for further CMOS scaling: SOI or bulk?. In 35th European Solid-State Circuits Conference, ESSCIRC 2009, Athens, Greece, 14-18 September 2009. pages 84-87, IEEE, 2009. [doi]

@inproceedings{ChiarellaWMKDRO09,
  title = {Migrating from planar to FinFET for further CMOS scaling: SOI or bulk?},
  author = {Thomas Chiarella and Liesbeth Witters and Abdelkarim Mercha and C. Kerner and R. Dittrich and Michal Rakowski and C. Ortolland and L.-Å. Ragnarsson and Bertrand Parvais and A. De Keersgieter and S. Kubicek and A. Redolfi and R. Rooyackers and C. Vrancken and S. Brus and A. Lauwers and Philippe Absil and S. Biesemans and Thomas K. Hoffmann},
  year = {2009},
  doi = {10.1109/ESSCIRC.2009.5325993},
  url = {https://doi.org/10.1109/ESSCIRC.2009.5325993},
  researchr = {https://researchr.org/publication/ChiarellaWMKDRO09},
  cites = {0},
  citedby = {0},
  pages = {84-87},
  booktitle = {35th European Solid-State Circuits Conference, ESSCIRC 2009, Athens, Greece, 14-18 September 2009},
  publisher = {IEEE},
  isbn = {978-1-4244-4354-3},
}