The following publications are possibly variants of this publication:
- Automated design space exploration for FPGA-based heterogeneous interconnectsAlessandro Cilardo, Edoardo Fusella, Luca Gallo, Antonino Mazzeo, Nicola Mazzocca. dafes, 18(3-4):157-170, 2014. [doi]
- Exploiting Concurrency for the Automated Synthesis of MPSoC InterconnectsAlessandro Cilardo, Edoardo Fusella, Luca Gallo, Antonino Mazzeo. tecs, 14(3):57, 2015. [doi]
- Joint communication scheduling and interconnect synthesis for FPGA-based many-core systemsAlessandro Cilardo, Edoardo Fusella, Luca Gallo, Antonino Mazzeo. date 2014: 1-4 [doi]
- Scheduling-aware interconnect synthesis for FPGA-based Multi-Processor Systems-on-ChipEdoardo Fusella, Alessandro Cilardo, Antonino Mazzeo. fpl 2015: 1-2 [doi]