A 1Mb 28nm STT-MRAM with 2.8ns read access time at 1.2V VDD using single-cap offset-cancelled sense amplifier and in-situ self-write-termination - researchr publication authors

researchr

You are not signed in
Sign in
Sign up

Qing Dong, Zhehong Wang, Jongyup Lim, Yiqun Zhang 0002, Yi-Chun Shih, Yu-Der Chih, Jonathan Chang, David Blaauw, Dennis Sylvester. A 1Mb 28nm STT-MRAM with 2.8ns read access time at 1.2V VDD using single-cap offset-cancelled sense amplifier and in-situ self-write-termination. In 2018 IEEE International Solid-State Circuits Conference, ISSCC 2018, San Francisco, CA, USA, February 11-15, 2018. pages 480-482, IEEE, 2018. [doi]

This author has not been identified. Look up 'Qing Dong' in GoogleThis author has not been identified. Look up 'Zhehong Wang' in GoogleThis author has not been identified. Look up 'Jongyup Lim' in GoogleThis author has not been identified. Look up 'Yiqun Zhang 0002' in GoogleThis author has not been identified. Look up 'Yi-Chun Shih' in GoogleThis author has not been identified. Look up 'Yu-Der Chih' in GoogleThis author has not been identified. Look up 'Jonathan Chang' in GoogleThis author has not been identified. Look up 'David Blaauw' in GoogleThis author has not been identified. Look up 'Dennis Sylvester' in Google

runs on WebDSL