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Aristides Efthymiou. Initialization-Based Test Pattern Generation for Asynchronous Circuits. IEEE Trans. VLSI Syst., 18(4):591-601, 2010. [doi]
Possibly Related PublicationsThe following publications are possibly variants of this publication: A Partial Scan Based Test Generation for Asynchronous CircuitsDilip P. Vasudevan, Aristides Efthymiou. ddecs 2008: 186-189 [doi] Redundancy and Test-Pattern Generation for Asynchronous Quasi-Delay-Insensitive Combinational CircuitsAristides Efthymiou. ddecs 2007: 377-382
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