Josep Torras Flaquer, Jean-Marc Daveau, Lirida A. B. Naviner, Philippe Roche. An approach to reduce computational cost in combinatorial logic netlist reliability analysis using circuit clustering and conditional probabilities. In 17th IEEE International On-Line Testing Symposium (IOLTS 2011), 13-15 July, 2011, Athens, Greece. pages 98-103, IEEE, 2011. [doi]
@inproceedings{FlaquerDNR11,
title = {An approach to reduce computational cost in combinatorial logic netlist reliability analysis using circuit clustering and conditional probabilities},
author = {Josep Torras Flaquer and Jean-Marc Daveau and Lirida A. B. Naviner and Philippe Roche},
year = {2011},
doi = {10.1109/IOLTS.2011.5993818},
url = {http://doi.ieeecomputersociety.org/10.1109/IOLTS.2011.5993818},
tags = {analysis, logic, reliability, systematic-approach},
researchr = {https://researchr.org/publication/FlaquerDNR11},
cites = {0},
citedby = {0},
pages = {98-103},
booktitle = {17th IEEE International On-Line Testing Symposium (IOLTS 2011), 13-15 July, 2011, Athens, Greece},
publisher = {IEEE},
isbn = {978-1-4577-1053-7},
}