The following publications are possibly variants of this publication:
- A Post-Silicon Debug Support Using High-Level Design DescriptionYeonbok Lee, Tasuku Nishihara, Takeshi Matsumoto, Masahiro Fujita. ats 2009: 137-142 [doi]
- Generation of I/O sequences for a high-level design from those in post-silicon for efficient post-silicon debuggingYeonbok Lee, Takeshi Matsumoto, Masahiro Fujita. iccd 2010: 402-408 [doi]
- An Automatic Method of Mapping I/O Sequences of Chip Execution onto High-level Design for Post-Silicon DebuggingYeonbok Lee, Takeshi Matsumoto, Masahiro Fujita. ieicet, 94-A(7):1519-1529, 2011. [doi]
- A debugging method for repairing post-silicon bugs of high performance processors in the fieldsBijan Alizadeh, Masahiro Fujita. fpt 2010: 328-331 [doi]
- Debugging from high level down to gate levelMasahiro Fujita, Yoshihisa Kojima, Amir Masoud Gharehbaghi. dac 2009: 627-630 [doi]