Circuit Topology-Based Test Pattern Generation for Small-Delay Defects

Sandeep Kumar Goel, Krishnendu Chakrabarty. Circuit Topology-Based Test Pattern Generation for Small-Delay Defects. In Sandeep Kumar Goel, Krishnendu Chakrabarty, editors, Testing for Small-Delay Defects in Nanoscale CMOS Integrated Circuits. pages 161-184, CRC Press, 2014.

Authors

Sandeep Kumar Goel

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Krishnendu Chakrabarty

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