The following publications are possibly variants of this publication:
- Circuit Topology-Based Test Pattern Generation for Small-Delay DefectsSandeep Kumar Goel, Krishnendu Chakrabarty, Mahmut Yilmaz, Ke Peng, Mohammad Tehranipoor. ats 2010: 307-312 [doi]
- Hybrid/Top-off Test Pattern Generation Schemes for Small-Delay DefectsSandeep Kumar Goel, Narendra Devta-Prasanna. In Sandeep Kumar Goel, Krishnendu Chakrabarty, editors, Testing for Small-Delay Defects in Nanoscale CMOS Integrated Circuits. pages 147-160, CRC Press, 2014.
- Effective and Efficient Test Pattern Generation for Small Delay DefectSandeep Kumar Goel, Narendra Devta-Prasanna, Ritesh P. Turakhia. vts 2009: 111-116 [doi]
- Generation of compact test sets with high defect coverageXrysovalantis Kavousianos, Krishnendu Chakrabarty. date 2009: 1130-1135 [doi]