Jun Han, Xingxing Zhang, Yi Li, Baoyu Xiong, Yuejun Zhang, Zhang Zhang, Zhiyi Yu, Jun Han, Xu Cheng, Xiaoyang Zeng. A 64×32bit 4-read 2-write low power and area efficient register file in 65nm CMOS. IEICE Electronic Express, 9(16):1355-1361, 2012. [doi]
@article{HanZLXZZYHCZ12,
title = {A 64×32bit 4-read 2-write low power and area efficient register file in 65nm CMOS},
author = {Jun Han and Xingxing Zhang and Yi Li and Baoyu Xiong and Yuejun Zhang and Zhang Zhang and Zhiyi Yu and Jun Han and Xu Cheng and Xiaoyang Zeng},
year = {2012},
doi = {10.1587/elex.9.1355},
url = {http://dx.doi.org/10.1587/elex.9.1355},
researchr = {https://researchr.org/publication/HanZLXZZYHCZ12},
cites = {0},
citedby = {0},
journal = {IEICE Electronic Express},
volume = {9},
number = {16},
pages = {1355-1361},
}