A 64×32bit 4-read 2-write low power and area efficient register file in 65nm CMOS - researchr publication related

researchr

You are not signed in
Sign in
Sign up

Jun Han, Xingxing Zhang, Yi Li, Baoyu Xiong, Yuejun Zhang, Zhang Zhang, Zhiyi Yu, Jun Han, Xu Cheng, Xiaoyang Zeng. A 64×32bit 4-read 2-write low power and area efficient register file in 65nm CMOS. IEICE Electronic Express, 9(16):1355-1361, 2012. [doi]

The following publications are possibly variants of this publication:

A control scheme for a 65nm 32×32b 4-read 2-write register fileJun Han, Xingxing Zhang, Baoyu Xiong, Zhiyi Yu, Xiaoyang Zeng. asicon 2011: 739-742 [doi]

A 500-MHz low-power five-port CMOS register fileJiajing Wang, Qianling Zhang. aspdac 2003: 511-514 [doi]

runs on WebDSL