Diagnosis of Transistor Shorts in Logic Test Environment

Yoshinobu Higami, Kewal K. Saluja, Hiroshi Takahashi, Sin-ya Kobayashi, Yuzo Takamatsu. Diagnosis of Transistor Shorts in Logic Test Environment. In 15th Asian Test Symposium, ATS 2006, Fukuoka, Japan, November 20-23, 2006. pages 354-359, IEEE, 2006. [doi]

Abstract

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