Researchr is a web site for finding, collecting, sharing, and reviewing scientific publications, for researchers by researchers.
Sign up for an account to create a profile with publication list, tag and review your related work, and share bibliographies with your co-authors.
Anh Tuan Hoang, Takeshi Fujino. Intra-Masking Dual-Rail Memory on LUT Implementation for SCA-Resistant AES on FPGA. TRETS, 7(2):10, 2014. [doi]
Possibly Related PublicationsThe following publications are possibly variants of this publication: Hybrid masking using intra-masking dual-rail memory on LUT for SCA-Resistant AES implementation on FPGA (abstract only)Anh Tuan Hoang, Takeshi Fujino. fpga 2013: 266-267 [doi] Intra-masking dual-rail memory on LUT implementation for tamper-resistant AES on FPGAAnh Tuan Hoang, Takeshi Fujino. fpga 2012: 1-10 [doi]
The following publications are possibly variants of this publication: