2.4GHz, Double-Buffered, 4kb Standard-Cell-Based Register File with Low-Power Mixed-Frequency Clocking for Machine Learning Accelerators

Steven Hsu, Amit Agarwal 0001, Mark A. Anders 0001, Arnab Raha, Raymond Sung, Deepak Mathaikutty, Ram Krishnamurthy 0001, James W. Tschanz, Vivek De. 2.4GHz, Double-Buffered, 4kb Standard-Cell-Based Register File with Low-Power Mixed-Frequency Clocking for Machine Learning Accelerators. In IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022. pages 22-23, IEEE, 2022. [doi]

Abstract

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