Clock design of 300MHz 128-bit 2-way superscalar microprocessor

Fujio Ishihara, Christian Klinger, Ken-ichi Agawa. Clock design of 300MHz 128-bit 2-way superscalar microprocessor. In Proceedings of ASP-DAC 2000, Asia and South Pacific Design Automation Conference 2000, Yokohama, Japan. pages 647-652, ACM, 2000. [doi]

Abstract

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