The following publications are possibly variants of this publication:
- A 0.25-/spl mu/m 3.0-V 1T1C 32-Mb nonvolatile ferroelectric RAM with address transition detector and current forcing latch sense amplifier schemeMun-Kyu Choi, Byung-gil Jeon, Nakwon Jang, Byung Jun Min, Yoon-Jong Song, Sung-Yung Lee, Hyun-Ho Kim, Dong-Jin Jung, Heung-Jin Joo, Kinam Kim. jssc, 37(11):1472-1478, 2002. [doi]
- A 3.3-V, 4-Mb nonvolatile ferroelectric RAM with selectively driven double-pulsed plate read/write-back schemeYeonbae Chung, Byung-gil Jeon, Kang-Deog Suh. jssc, 35(5):697-704, 2000. [doi]
- A 3.3-V 12-b 50-MS/s A/D converter in 0.6-/spl mu/m CMOS with over 80-dB SFDRHui Pan, Masahiro Segami, Michael Choi, Jing Cao, Asad A. Abidi. jssc, 35(12):1769-1780, 2000. [doi]