Yanbin Jiang, Sachin S. Sapatnekar, Cyrus Bamji, Juho Kim. Interleaving buffer insertion and transistor sizing into a single optimization. IEEE Trans. VLSI Syst., 6(4):625-633, 1998. [doi]
@article{JiangSBK98,
title = {Interleaving buffer insertion and transistor sizing into a single optimization},
author = {Yanbin Jiang and Sachin S. Sapatnekar and Cyrus Bamji and Juho Kim},
year = {1998},
doi = {10.1109/92.736136},
url = {http://doi.ieeecomputersociety.org/10.1109/92.736136},
tags = {optimization},
researchr = {https://researchr.org/publication/JiangSBK98},
cites = {0},
citedby = {0},
journal = {IEEE Trans. VLSI Syst.},
volume = {6},
number = {4},
pages = {625-633},
}