A Hardware Accelerator for the Semi-Global Matching Stereo Algorithm: An Efficient Implementation for the Stratix V and Zynq UltraScale+ FPGA Technology - researchr publication authors

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John A. Kalomiros, John V. Vourvoulakis, Stavros Vologiannidis. A Hardware Accelerator for the Semi-Global Matching Stereo Algorithm: An Efficient Implementation for the Stratix V and Zynq UltraScale+ FPGA Technology. TRETS, 17(1), March 2024. [doi]

This author has not been identified. Look up 'John A. Kalomiros' in GoogleThis author has not been identified. Look up 'John V. Vourvoulakis' in GoogleThis author has not been identified. Look up 'Stavros Vologiannidis' in Google

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