John A. Kalomiros, John V. Vourvoulakis, Stavros Vologiannidis. A Hardware Accelerator for the Semi-Global Matching Stereo Algorithm: An Efficient Implementation for the Stratix V and Zynq UltraScale+ FPGA Technology. TRETS, 17(1), March 2024. [doi]
@article{KalomirosVV24,
title = {A Hardware Accelerator for the Semi-Global Matching Stereo Algorithm: An Efficient Implementation for the Stratix V and Zynq UltraScale+ FPGA Technology},
author = {John A. Kalomiros and John V. Vourvoulakis and Stavros Vologiannidis},
year = {2024},
month = {March},
doi = {10.1145/3615869},
url = {https://doi.org/10.1145/3615869},
researchr = {https://researchr.org/publication/KalomirosVV24},
cites = {0},
citedby = {0},
journal = {TRETS},
volume = {17},
number = {1},
}