Burhan Khurshid. Technology-Optimized Fixed-Point Bit-Parallel Multipliers for FPGAs. VLSI Signal Processing, 89(2):293-317, 2017. [doi]
@article{Khurshid17-0,
title = {Technology-Optimized Fixed-Point Bit-Parallel Multipliers for FPGAs},
author = {Burhan Khurshid},
year = {2017},
doi = {10.1007/s11265-016-1195-5},
url = {https://doi.org/10.1007/s11265-016-1195-5},
researchr = {https://researchr.org/publication/Khurshid17-0},
cites = {0},
citedby = {0},
journal = {VLSI Signal Processing},
volume = {89},
number = {2},
pages = {293-317},
}